[PATCH] [ARM] serial/pxa: work around Errata #75

Hello,

[Added Greg to Cc:]

On Tue, Nov 03, 2009 at 11:47:15AM +0100, Uwe Kleine-K?nig wrote:

quoted

Intel(R) PXA27x Processor Family Specification Update (Nov 2005)
says:

? E75. UART: Baud rate may not be programmed correctly on
? ? ? ?back-to-back writes.

? Problem:
? When programming the Divisor Latch registers, Low and High (DLL and
? DLH), with back-to-back writes, the second register write may not
? take effect. The result is an incorrect baud rate.

? Workaround:
? After programming the first Divisor Latch register, read and verify
? it before programming the second Divisor Latch register.

This was hit when changing the baud rate from 115200 to 9600 while
receiving characters at 9600 Bd.

And fixed indention of some comments nearby.

I havn't received any feed-back for this up to now.

Did I address the right people? ?Are you just burried in work?
Assuming the patch is OK, which is the right path into mainline?
Some patches touching drivers/serial/pxa.c went in via Russell's tree,
bdc04e3 (serial: move delta_msr_wait into the tty_port) went in via
gregkh/tty-2.6.

Greg: as you didn't get the original patch you can find it below.

Best regards
Uwe

From d49d3dd085215de67e1cc3d7129abaa8c70b3646 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <redacted>
Date: Tue, 3 Nov 2009 11:02:37 +0100
Subject: [PATCH 1/3] [ARM] serial/pxa: work around Errata #75
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Intel(R) PXA27x Processor Family Specification Update (Nov 2005)
says:

?E75. UART: Baud rate may not be programmed correctly on
? ? ? back-to-back writes.

?Problem:
?When programming the Divisor Latch registers, Low and High (DLL and
?DLH), with back-to-back writes, the second register write may not
?take effect. The result is an incorrect baud rate.

?Workaround:
?After programming the first Divisor Latch register, read and verify
?it before programming the second Divisor Latch register.

This was hit when changing the baud rate from 115200 to 9600 while
receiving characters at 9600 Bd.

And fixed indention of some comments nearby.

Signed-off-by: Uwe Kleine-K?nig <redacted>
Acked-by: Wolfram Sang <redacted>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: Eric Miao <redacted>
Cc: Alan Cox <redacted>
Cc: Mike Rapoport <redacted>
---
?drivers/serial/pxa.c | ? 13 +++++++++++--
?1 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index b8629d7..4a82104 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c

@@ -438,6 +438,7 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,

? ? ? ?unsigned char cval, fcr = 0;
? ? ? ?unsigned long flags;
? ? ? ?unsigned int baud, quot;
+ ? ? ? unsigned int dll;

? ? ? ?switch (termios->c_cflag & CSIZE) {
? ? ? ?case CS5:

@@ -534,10 +535,18 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,

? ? ? ?else
? ? ? ? ? ? ? ?up->mcr &= ~UART_MCR_AFE;

- ? ? ? serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
+ ? ? ? serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
? ? ? ?serial_out(up, UART_DLL, quot & 0xff); ? ? ? ? ?/* LS of divisor */
+
+ ? ? ? /*
+ ? ? ? ?* work around Errata #75 according to Intel(R) PXA27x Processor Family
+ ? ? ? ?* Specification Update (Nov 2005)
+ ? ? ? ?*/
+ ? ? ? dll = serial_in(up, UART_DLL);
+ ? ? ? WARN_ON(dll != (quot & 0xff));
+