Thread (86 messages) 86 messages, 12 authors, 2018-07-13

Re: [PATCH V2 16/19] csky: SMP support

From: Mark Rutland <mark.rutland@arm.com>
Date: 2018-07-06 11:44:03
Also in: lkml

On Fri, Jul 06, 2018 at 07:32:01PM +0800, Guo Ren wrote:
On Fri, Jul 06, 2018 at 06:24:33AM +0100, Mark Rutland wrote:
quoted
quoted
+	if (cpu >= NR_CPUS)
+		goto error;
+
+	if (of_property_read_string(node, "status", &status))
+		status = "enable";
+
+	if (strcmp(status, "disable") == 0)
+		goto error;
Please use of_device_is_available(node); 
Ok.
quoted
"enable" is not a sensible value for
the status property, and "disable" (rather than "disabled") is simply unusual.

Neither "enable" nor "disable" are correct values for the status property.
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			device_type = "cpu";
			reg = <0>;
			status = "on";
		};

		cpu@1 {
			device_type = "cpu";
			reg = <1>;
			status = "off";
		};
	};
Neither "on" nor "off" are standard status values either.

Please see the devicetree spec [1], section 2.3.4. Valid values are:

* "okay" // equivalent to no status property present
* "disabled"
* "fail"
* "fail-sss"
quoted
What is the value in the reg property, exactly?
See above, I'll remove the reg property and it's no use.
quoted
Is there a unique ID in
hardware for each CPU in the system?
There is no unique ID in current CPU: ck860.
I'm a bit confused. You write (1 << cpu) into cv<29, 0>, to enable a
particular CPU, so I assume that bit uniquely identifies a CPU, and
therefore the reg is some unique ID for the CPU.

[...]
quoted
quoted
+int __cpu_up(unsigned int cpu, struct task_struct *tidle)
+{
+	unsigned int tmp;
+
+	secondary_stack = (unsigned int)tidle->stack + THREAD_SIZE;
+
+	secondary_hint = mfcr("cr31");
+
+	secondary_ccr  = mfcr("cr18");
+
+	pr_info("%s: CPU%u\n", __func__, cpu);
+
+	tmp = mfcr("cr<29, 0>");
+	tmp |= 1 << cpu;
+	mtcr("cr<29, 0>", tmp);
+
+	while (!cpu_online(cpu));
+
+	secondary_stack = 0;
+
+	return 0;
+}
I don't see a start address being setup here, so I assume that CPUs branch to a
fixed address out-of-reset. Does that mean that the kernel has to be loaded at
a particular physical address on a given platform?
No, not a fixed address. I put it arch/csky/kernel/traps.c:79-83
trap_init()
#ifdef CONFIG_SMP
	mtcr("cr<28, 0>", virt_to_phys(vec_base));

	VEC_INIT(VEC_RESET, (void *)virt_to_phys(_start_smp_secondary));
#endi
I see.

Is this SMP bringup mechanism architectual, or are you likely to need
another mechanism to turn on CPUs on future chips?

You probably want to use an enable-method property to describe this.

Thanks,
Mark.

[1] https://www.devicetree.org/specifications/
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