Re: [PATCH 29/31] parisc: handle page-less SG entries
From: David Miller <davem@davemloft.net>
Date: 2015-08-14 04:12:01
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linux-alpha, linux-media, linux-mips, linux-s390, linuxppc-dev, lkml, sparclinux
From: James Bottomley <James.Bottomley@HansenPartnership.com> Date: Thu, 13 Aug 2015 20:59:20 -0700
On Thu, 2015-08-13 at 20:30 -0700, Dan Williams wrote:quoted
On Thu, Aug 13, 2015 at 7:31 AM, Christoph Hellwig [off-list ref] wrote:quoted
On Wed, Aug 12, 2015 at 09:01:02AM -0700, Linus Torvalds wrote:quoted
I'm assuming that anybody who wants to use the page-less scatter-gather lists always does so on memory that isn't actually virtually mapped at all, or only does so on sane architectures that are cache coherent at a physical level, but I'd like that assumption *documented* somewhere.It's temporarily mapped by kmap-like helpers. That code isn't in this series. The most recent version of it is here: https://git.kernel.org/cgit/linux/kernel/git/djbw/nvdimm.git/commit/?h=pfn&id=de8237c99fdb4352be2193f3a7610e902b9bb2f0 note that it's not doing the cache flushing it would have to do yet, but it's also only enabled for x86 at the moment.For virtually tagged caches I assume we would temporarily map with kmap_atomic_pfn_t(), similar to how drm_clflush_pages() implements powerpc support. However with DAX we could end up with multiple virtual aliases for a page-less pfn.At least on some PA architectures, you have to be very careful. Improperly managed, multiple aliases will cause the system to crash (actually a machine check in the cache chequerboard). For the most temperamental systems, we need the cache line flushed and the alias mapping ejected from the TLB cache before we access the same page at an inequivalent alias.
Also, I want to mention that on sparc64 we manage the cache aliasing state in the page struct. Until a page is mapped into userspace, we just record the most recent cpu to store into that page with kernel side mappings. Once the page ends up being mapped or the cpu doing kernel side stores changes, we actually perform the cache flush. Generally speaking, I think that all actual physical memory the kernel operates on should have a struct page backing it. So this whole discussion of operating on physical memory in scatter lists without backing page structs feels really foreign to me.