On 01/23/2014 12:15 PM, Linus Torvalds wrote:

On Thu, Jan 23, 2014 at 9:12 AM, Waiman Long[off-list ref]  wrote:

quoted

I thought that all atomic RMW instructions are memory barrier.

On x86 they are. Not necessarily elsewhere.

quoted

If they are not, what kind of barrier should be added?

smp_mb__before_atomic_xyz() and smp_mb__after_atomic_xyz() will do it,
and are no-op (well, barriers - I don't think it matters) on x86.

             Linus
-

Thank for the info. I am less familiar with that kind of issues on other 
architecture. I will add a smp_mb__after_atomic_dec() & send out a new 
patch.

-Longman