On Mon, Jun 02, 2008 at 10:11:02AM +0200, Haavard Skinnemoen wrote:

Geert Uytterhoeven [off-list ref] wrote:

quoted

On Fri, 30 May 2008, Haavard Skinnemoen wrote:

quoted

Maybe we need another interface that does not do byteswapping but
provides stronger ordering guarantees?

The byte swapping depends on the device/bus.

Of course. But isn't it reasonable to assume that a device integrated
on the same silicon as the CPU is connected to a somewhat sane bus
which doesn't require any byte swapping?

No, unfortunately. :-(

See the end of drivers/dma/fsldma.h.  Likewise with Freescale's PCI host
bridges; for some reason the bus itself being little endian led to the host
bridge control registers also being little endian.

-Scott