[PATCH RFC 4/4] arm64/io: Add {__raw_read|__raw_write}128 support
From: Chenghai Huang <hidden>
Date: 2025-11-12 01:58:53
Also in:
linux-arch, linux-arm-kernel, linux-crypto, lkml
Subsystem:
arm64 port (aarch64 architecture), the rest · Maintainers:
Catalin Marinas, Will Deacon, Linus Torvalds
From: Weili Qian <qianweili@huawei.com>
Starting from ARMv8.4, stp and ldp instructions become atomic.
Currently, device drivers depend on 128-bit atomic memory IO access,
but these are implemented within the drivers. Therefore, this introduces
generic {__raw_read|__raw_write}128 function for 128-bit memory access.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Chenghai Huang <redacted>
---
arch/arm64/include/asm/io.h | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 83e03abbb2ca..80430750a28c 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h@@ -50,6 +50,17 @@ static __always_inline void __raw_writeq(u64 val, volatile void __iomem *addr) asm volatile("str %x0, %1" : : "rZ" (val), "Qo" (*ptr)); } +#define __raw_write128 __raw_write128 +static __always_inline void __raw_write128(u128 val, volatile void __iomem *addr) +{ + u64 low, high; + + low = val; + high = (u64)(val >> 64); + + asm volatile ("stp %x0, %x1, [%2]\n" :: "rZ"(low), "rZ"(high), "r"(addr)); +} + #define __raw_readb __raw_readb static __always_inline u8 __raw_readb(const volatile void __iomem *addr) {
@@ -95,6 +106,16 @@ static __always_inline u64 __raw_readq(const volatile void __iomem *addr) return val; } +#define __raw_read128 __raw_read128 +static __always_inline u128 __raw_read128(const volatile void __iomem *addr) +{ + u64 high, low; + + asm volatile("ldp %0, %1, [%2]" : "=r" (low), "=r" (high) : "r" (addr)); + + return (((u128)high << 64) | (u128)low); +} + /* IO barriers */ #define __io_ar(v) \ ({ \
--
2.33.0