[PATCH v29 02/10] x86/cet/ibt: Add user-mode Indirect Branch Tracking support
From: Yu-cheng Yu <hidden>
Date: 2021-08-20 18:25:50
Also in:
linux-arch, linux-doc, linux-mm, lkml
Subsystem:
the rest, x86 architecture (32-bit and 64-bit) · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen
Introduce user-mode Indirect Branch Tracking (IBT) support. Add routines for the setup/disable of IBT. Signed-off-by: Yu-cheng Yu <redacted> Cc: Kees Cook <redacted> --- v28: - When IBT feature is not present, make ibt_setup() return success, since this is a setup function. v27: - Change struct thread_shstk: ibt_enabled to ibt. - Create a helper for set/clear bits of MSR_IA32_U_CET. --- arch/x86/include/asm/cet.h | 9 ++++++ arch/x86/kernel/Makefile | 1 + arch/x86/kernel/ibt.c | 58 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 68 insertions(+) create mode 100644 arch/x86/kernel/ibt.c
diff --git a/arch/x86/include/asm/cet.h b/arch/x86/include/asm/cet.h
index c76a85fbd59f..3dfca29a7c0b 100644
--- a/arch/x86/include/asm/cet.h
+++ b/arch/x86/include/asm/cet.h@@ -14,6 +14,7 @@ struct thread_shstk { u64 base; u64 size; u64 locked:1; + u64 ibt:1; }; #ifdef CONFIG_X86_SHADOW_STACK
@@ -42,6 +43,14 @@ static inline int setup_signal_shadow_stack(int ia32, void __user *restorer) { r static inline int restore_signal_shadow_stack(void) { return 0; } #endif +#ifdef CONFIG_X86_IBT +int ibt_setup(void); +void ibt_disable(void); +#else +static inline int ibt_setup(void) { return 0; } +static inline void ibt_disable(void) {} +#endif + #ifdef CONFIG_X86_SHADOW_STACK int prctl_cet(int option, u64 arg2); #else
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 39e826b5cabd..cce07a920fec 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile@@ -152,6 +152,7 @@ obj-$(CONFIG_UNWINDER_GUESS) += unwind_guess.o obj-$(CONFIG_AMD_MEM_ENCRYPT) += sev.o obj-$(CONFIG_X86_SHADOW_STACK) += shstk.o obj-$(CONFIG_X86_SHADOW_STACK) += shstk.o cet_prctl.o +obj-$(CONFIG_X86_IBT) += ibt.o ### # 64 bit specific files ifeq ($(CONFIG_X86_64),y)
diff --git a/arch/x86/kernel/ibt.c b/arch/x86/kernel/ibt.c
new file mode 100644
index 000000000000..4ab7af33b274
--- /dev/null
+++ b/arch/x86/kernel/ibt.c@@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ibt.c - Intel Indirect Branch Tracking support + * + * Copyright (c) 2021, Intel Corporation. + * Yu-cheng Yu <yu-cheng.yu@intel.com> + */ + +#include <linux/user.h> +#include <asm/fpu/internal.h> +#include <asm/fpu/xstate.h> +#include <asm/fpu/types.h> +#include <asm/msr.h> +#include <asm/cet.h> + +static int ibt_set_clear_msr_bits(u64 set, u64 clear) +{ + u64 msr; + int r; + + fpregs_lock(); + + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + fpregs_restore_userregs(); + + r = rdmsrl_safe(MSR_IA32_U_CET, &msr); + if (!r) { + msr = (msr & ~clear) | set; + r = wrmsrl_safe(MSR_IA32_U_CET, msr); + } + + fpregs_unlock(); + + return r; +} + +int ibt_setup(void) +{ + int r; + + if (!cpu_feature_enabled(X86_FEATURE_IBT)) + return 0; + + r = ibt_set_clear_msr_bits(CET_ENDBR_EN | CET_NO_TRACK_EN, 0); + if (!r) + current->thread.shstk.ibt = 1; + + return r; +} + +void ibt_disable(void) +{ + if (!current->thread.shstk.ibt) + return; + + ibt_set_clear_msr_bits(0, CET_ENDBR_EN); + current->thread.shstk.ibt = 0; +}
--
2.21.0