[PATCH v22 8/8] x86/vdso: Add ENDBR64 to __vdso_sgx_enter_enclave
From: Yu-cheng Yu <hidden>
Date: 2021-03-10 22:06:29
Also in:
linux-arch, linux-doc, linux-mm, lkml
Subsystem:
the rest, x86 architecture (32-bit and 64-bit), x86 entry code, x86 vdso · Maintainers:
Linus Torvalds, Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen, Andy Lutomirski
When CET is enabled, __vdso_sgx_enter_enclave() needs an endbr64 in the beginning of the function. Signed-off-by: Yu-cheng Yu <redacted> Cc: Andy Lutomirski <luto@kernel.org> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Jarkko Sakkinen <jarkko@kernel.org> --- arch/x86/entry/vdso/vsgx.S | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/x86/entry/vdso/vsgx.S b/arch/x86/entry/vdso/vsgx.S
index 86a0e94f68df..a70d4d09f713 100644
--- a/arch/x86/entry/vdso/vsgx.S
+++ b/arch/x86/entry/vdso/vsgx.S@@ -27,6 +27,9 @@ SYM_FUNC_START(__vdso_sgx_enter_enclave) /* Prolog */ .cfi_startproc +#ifdef CONFIG_X86_CET + endbr64 +#endif push %rbp .cfi_adjust_cfa_offset 8 .cfi_rel_offset %rbp, 0
--
2.21.0