Thread (16 messages) 16 messages, 4 authors, 2019-04-23

Re: [PATCH 1/5] glibc: Perform rseq(2) registration at C startup and thread creation (v8)

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From: Szabolcs Nagy <hidden>
Date: 2019-04-23 11:16:11
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On 18/04/2019 19:17, Mathieu Desnoyers wrote:
----- On Apr 18, 2019, at 1:37 PM, Szabolcs Nagy Szabolcs.Nagy@arm.com wrote:
quoted
you have to add a documentation comment somewhere
explaining if RSEQ_SIG is the value that's passed to
the kernel and then aarch64 asm code has to use

.inst endianfixup(RSEQ_SIG) // or
.word RSEQ_SIG
Using ".word" won't allow objdump to show the instruction it
maps to. It will consider it as data. So .inst is preferred here.
is there some specific reason you prefer .inst?

disassembling a canary value as data (that is
never executed, but loaded and compared by the
kernel as data) sounds more semantically correct
to me than showing it as an instruction.

i guess having it as an instruction can avoid
issues if some tools dislike .word in .text,
but otherwise .word seems better.
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