Thread (23 messages) 23 messages, 4 authors, 2018-10-10

Re: [RFC PATCH v4 3/9] x86/cet/ibt: Add IBT legacy code bitmap allocation function

From: Andy Lutomirski <luto@kernel.org>
Date: 2018-10-04 16:11:31
Also in: linux-arch, linux-doc, linux-mm, lkml

On Fri, Sep 21, 2018 at 8:10 AM Yu-cheng Yu [off-list ref] wrote:
quoted hunk ↗ jump to hunk
Indirect branch tracking provides an optional legacy code bitmap
that indicates locations of non-IBT compatible code.  When set,
each bit in the bitmap represents a page in the linear address is
legacy code.

We allocate the bitmap only when the application requests it.
Most applications do not need the bitmap.

Signed-off-by: Yu-cheng Yu <redacted>
---
 arch/x86/kernel/cet.c | 45 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)
diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c
index 6adfe795d692..a65d9745af08 100644
--- a/arch/x86/kernel/cet.c
+++ b/arch/x86/kernel/cet.c
@@ -314,3 +314,48 @@ void cet_disable_ibt(void)
        wrmsrl(MSR_IA32_U_CET, r);
        current->thread.cet.ibt_enabled = 0;
 }
+
+int cet_setup_ibt_bitmap(void)
+{
+       u64 r;
+       unsigned long bitmap;
+       unsigned long size;
+
+       if (!cpu_feature_enabled(X86_FEATURE_IBT))
+               return -EOPNOTSUPP;
+
+       if (!current->thread.cet.ibt_bitmap_addr) {
+               /*
+                * Calculate size and put in thread header.
+                * may_expand_vm() needs this information.
+                */
+               size = TASK_SIZE / PAGE_SIZE / BITS_PER_BYTE;
+               current->thread.cet.ibt_bitmap_size = size;
+               bitmap = do_mmap_locked(0, size, PROT_READ | PROT_WRITE,
+                                       MAP_ANONYMOUS | MAP_PRIVATE,
+                                       VM_DONTDUMP);
+
+               if (bitmap >= TASK_SIZE) {
+                       current->thread.cet.ibt_bitmap_size = 0;
+                       return -ENOMEM;
+               }
+
+               current->thread.cet.ibt_bitmap_addr = bitmap;
+       }
+
+       /*
+        * Lower bits of MSR_IA32_CET_LEG_IW_EN are for IBT
+        * settings.  Clear lower bits even bitmap is already
+        * page-aligned.
+        */
+       bitmap = current->thread.cet.ibt_bitmap_addr;
+       bitmap &= PAGE_MASK;
+
+       /*
+        * Turn on IBT legacy bitmap.
+        */
+       rdmsrl(MSR_IA32_U_CET, r);
+       r |= (MSR_IA32_CET_LEG_IW_EN | bitmap);
+       wrmsrl(MSR_IA32_U_CET, r);
+       return 0;
Why are you writing the MSRs in the case where the bitmap was already allocated?
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