Re: Context switch latency in tickless isolated CPU

On Sun, Aug 21, 2016 at 10:53 PM, Paul E. McKenney
[off-list ref] wrote:

If latency is all you care about, one approach is to map the device
registers into userspace and do the I/O without assistance from the
kernel.

In addition to the context switch latency, local interrupts are also
closed during
user_enter and user_exit of the context tracking. Therefore, the interrupt
latency might be also increased on the isolated tickless CPU. That
will degrade the
real time performance. Are these two events determined?

Thanks,
Kang