Am Mittwoch, den 20.05.2015, 18:17 +0200 schrieb Maxime Coquelin:

Hi Arnd, Philipp,

2015-05-13 21:11 GMT+02:00 Arnd Bergmann [off-list ref]:

quoted

Ideally the binding should follow closely what is documented
in the data sheet.

Daniel and myself would like your opinion about this binding:

rcc: rcc@40023800 {
    #reset-cells = <1>;
    #clock-cells = <2>;
    compatible = "st,stm32-rcc";
    reg = <0x40023800 0x10>, <0x40023810 0x20>, <0x40023830 0x20>;
    reg-names = "clock-cfg", "reset", "clock-gates";

"reset" singular, "clock-gates" plural seems inconsistent to me.

};

It would solve a problem Daniel is facing due to conflicting mem
region when clock and reset drivers are enabled, as both would reserve
the same region.

Also, it would make the reset driver very generic.
Doing that, we could even create a generic-reset.c driver that would
be used by STM32 and Sunxi (at least).

Adding support for providing the reset register range via of_device_id
data and the possibility to invert set/clear ops would allow to also
include the socfpga driver.

In the probe function, it would check the number of reg resources.
If a single resource is passed, it would take it, else it would look
the one named "reset".
The driver and bindings would be the same for the two families, and
the bindings would be backward compatible with sunxi ones.

Philip, Arnd, what do you think?

I'm not a fan of describing the register layout in the device tree as
detailed as the sunxi bindings do. I'd prefer the reg property to
describe the device's register address space with one entry per
contiguous block of registers.
Unifying the mostly identical drivers is a good idea though, and reusing
preexisting bindings is better than inventing new ones. I favor the
socfpga binding, but I still like the sunxi bindings and this proposal
better than encoding the register offset in the reset index.

best regards
Philipp