On Tue, 10 Aug 2021 18:55:12 +0100,
Oliver Upton [off-list ref] wrote:

On Tue, Aug 10, 2021 at 3:56 AM Marc Zyngier [off-list ref] wrote:

quoted

On Wed, 04 Aug 2021 09:58:15 +0100,
Oliver Upton [off-list ref] wrote:

[...]

quoted

quoted

diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index 73c7139c866f..7252ffa3d675 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h

@@ -21,6 +21,7 @@
 #define CNTHCTL_EVNTEN                       (1 << 2)
 #define CNTHCTL_EVNTDIR                      (1 << 3)
 #define CNTHCTL_EVNTI                        (0xF << 4)
+#define CNTHCTL_ECV                  (1 << 12)

 enum arch_timer_reg {
      ARCH_TIMER_REG_CTRL,

You also want to document that SCR_EL3.ECVEn has to be set to 1 for
this to work (see Documentation/arm64/booting.txt). And if it isn't,
the firmware better handle the CNTPOFF_EL2 traps correctly...

I'll grab the popcorn now ;-) Adding docs for this, good idea.

quoted

What firmware did you use for this? I think we need to update the boot
wrapper, but that's something that can be done in parallel.

I had actually just done a direct boot from ARM-TF -> Linux, nothing
else in between.

Ah, right. I tend to use the boot-wrapper[1] to build a single binary
that contains the 'boot loader', DT and kernel. Using ATF is probably
more representative of the final thing, but the boot-wrapper is dead
easy to hack on...

Thanks,

	M.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git

-- 
Without deviation from the norm, progress is not possible.