On Fri, 2012-12-21 at 17:34 +0800, Woody Wu wrote:

? 2012-12-21 AM2:05?"anish singh" [off-list ref]?
??

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On Dec 20, 2012 6:30 AM, "Woody Wu" [off-list ref] wrote:

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Hi, List

Where is the Kernel code that handles external interrupts? I want

to

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have a look at it but haven't found out where it is.

Actually, I have some basic questions about interrupt handling in

Linux.

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1. After Kernel's ISR received an interrupt, I believe it will

invoke a

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   handler defined in a device driver if any. But it should be the
   device driver's responsibility or kernel ISR's responsibility

to

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   clear (or acknowledge) the interrupt?

If the interrupt in question is currently being handled then in
the case of edge triggered interrupt we just mask the interrupt,set

it pending and bail out.Once the interrupt handler completes then we
check for pending interrupt and handle it.In level triggered we don't
do that.

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Kerenel ISR -this is mixture of core kernel interrupt handling code

+ your device driver interrupt handler(if this is chip driver which is
supposed to get one interrupt and is reponsible for calling other
interrupt handlers based on the chip register status then you do
explicit masking unmasking yourself).

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If you device driver is a interrupt controller driver then you

register your driver with kernel interrupt handling code and need to
write some callbacks such as .mask,.unmask and so on.This callbacks
are called at appropiate places whenever the interrupt is raised.This
interrupt is then passed to drivers who has requested for this
interrupt by calling request_irq.

Sorry not fully understand . My device is an interrupt line is back to
inactive.Ethernet controller. It needs to response TX and RX
interrupts triggered by the device itself. In this case , my driver is
a chip driver or interrupt controller driver in your terms?

Your device is neither of these.

If my driver needs to do the mask and unmask job, what's the kernel
API I should call?

You don't need to worry about mask and unmask job AFAIK.

And , I don't understand why there exists differences between level
and edge triggered interrupts in terms of kernel handling.

Level type interrupts are active as long as the hardware line has the
active level. This may require to mask the interrupt and unmask it after
the associated handler has acknowledged the device, so the interrupt
line is back to inactive.
Edge interrupt occurs on the falling and/or rising edge of a hardware
signal.The occurrence is latched into the irq controller hardware
and must be acked in order to be re-enabled.
Read the code /kerel/irq/chip.c(handle_edge_irq & handle_level_irq)

I know my questions might be basic , so would please tell me what's

If it was not basic then this question wouldn't be in kernelnewbies
right :)?

 the kernel code for ARM architecture doing these complex jobs as you
explained?

You don't need to worry about it but if you want to know further then I
suggest tracing the call flow from asm interrupt handler(I believe
do_irq but not sure) in arm to handle_edge_irq call flow by adding some
logs or just browsing the code.

Thanks in advance !

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2. My device, an AX88796B network controller, asserting the

interrupt

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   line in a level-triggered manner. Now I met problem with the

device that

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   might caused by the CPU interrupt mode is not set as

level-triggered by

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   edge trigger.  My CPU is Samsung S3C2410, an ARM920T powered

one.  Does

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   anyone know usually where and how should I do this kind of

setting?

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Just pass the parameter "level triggered" in request_irq in your

device driver.

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Thanks in advance.

--
woody
I can't go back to yesterday - because I was a different person

then.

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