Thread (6 messages) flat view 6 messages, 4 authors, 2011-05-26

Self modifying code in ARM 11 architectures

From: Ashok Babu <hidden>
Date: 2011-05-24 10:15:41
Also in: linux-omap

Hi All,

I am no success in booting up the ARM1176 processor with the linux-2.6.32
kernel.

While googling about the ARM Harvard architecture, I came to know that we
have to flush/invalidate the D-Cache and I-Cache
when using the self modifying codes.

So here my questions/doubts :
1) Is'nt it the kernel itself is self modifying code with lots of function
pointers ?
    If yes, how is synchronization b/w d-cache and i-cache handled in the
kernel ?
2) Can this be the reason for the kernel not booting for me ?
    Because If i disable the I-Cache in the config, then the kernel boots up
without any issues.

Any pointers on this will be of great help.

Thanks & Best Regards
Ashok
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.kernelnewbies.org/pipermail/kernelnewbies/attachments/20110524/cb5f4c47/attachment.html 
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help