Hi :)

On Tue, Feb 15, 2011 at 19:20, Darshan Ghumare
[off-list ref] wrote:

IMHO, When the Processor is executing interrupt handler of IRQ4 then
Processor is the one which pushes SS, SP, EFLAGS, CS ?& EIP ?on stack (in
this case this will all corresponds to interrupt handler of IRQ4) & loads CS
& EIP corresponding to IRQ5.
So, how come its depends on OS (kernel)? Please correct me if I am wrong.

OK, to make it clear, I was talking about bottom half prioritizing
.... the upper half is reacting whenever interrupt is coming (and it
is not currently masked/disabled) AFAIK. Bottom half is the part where
OS could do prioritizing if it indeed does so.

The only "prioritizing" (if you take it as prioritizing) in interrupt
is when it is fall into NMI (Non Maskable Interrupt). AFAIK, they
could just kick others in queue, just like real time task kick regular
process :) Uhm, maybe watchdog timer does same kind of interrupt
too...

Guys, CMIIW here...

-- 
regards,

Mulyadi Santosa
Freelance Linux trainer and consultant

blog: the-hydra.blogspot.com
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