Re: [PATCH 03/14] common/cnxk: fix NIX QINT count reset

On Thu, 17 Sep 2026 12:40:05 +0530
Rahul Bhansali [off-list ref] wrote:

Fix QINT count reset on NIX queue IRQs register and
unregister.
Queue interrupt will be cleared by individual queue
interrupt operation register update.

Fixes: f6d567b03d28 ("common/cnxk: support NIX IRQ")
Fixes: 3c100e0e6b9c ("common/cnxk: support per-port RQ in inline device")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <redacted>
---

More detailed AI review:

Patch 3/14 common/cnxk: fix NIX QINT count reset
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Warning: the inline dev path now clears QINTX_INT with ~0ull (W1C),
but roc_nix_register_queue_irqs() still does
  plt_write64(0, nix->base + NIX_LF_QINTX_INT(q));
before ENA_W1S, and roc_nix_unregister_queue_irqs() does the same.
Writing 0 to a W1C register clears nothing, so a stale QINT is still
pending when the interrupt is enabled. Use ~0ull in both places.

Info: the roc_nix path uses "int64_t val; plt_write64(-val, ...)"
while the inl path casts explicitly. Pick one form.