[PATCH v3 12/27] crypto/ccp: replace use of rte_atomic64 with stdatomic
From: Stephen Hemminger <stephen@networkplumber.org>
Date: 2026-05-23 19:59:55
Subsystem:
amd cryptographic coprocessor (ccp) driver, crypto api, the rest · Maintainers:
Tom Lendacky, John Allen, Herbert Xu, "David S. Miller", Linus Torvalds
The rte_atomicNN functions are deprecated. Replace the free count with stdatomic. Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> --- drivers/crypto/ccp/ccp_crypto.c | 11 +++++++---- drivers/crypto/ccp/ccp_crypto.h | 2 +- drivers/crypto/ccp/ccp_dev.c | 10 ++++++---- drivers/crypto/ccp/ccp_dev.h | 4 ++-- 4 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto/ccp/ccp_crypto.c b/drivers/crypto/ccp/ccp_crypto.c
index 5899d83bae..1800ad41c9 100644
--- a/drivers/crypto/ccp/ccp_crypto.c
+++ b/drivers/crypto/ccp/ccp_crypto.c@@ -2683,7 +2683,8 @@ process_ops_to_enqueue(struct ccp_qp *qp, b_info->cmd_q = cmd_q; b_info->lsb_buf_phys = (phys_addr_t)rte_mem_virt2iova((void *)b_info->lsb_buf); - rte_atomic64_sub(&b_info->cmd_q->free_slots, slots_req); + rte_atomic_fetch_sub_explicit(&b_info->cmd_q->free_slots, slots_req, + rte_memory_order_seq_cst); b_info->head_offset = (uint32_t)(cmd_q->qbase_phys_addr + cmd_q->qidx * Q_DESC_SIZE);
@@ -2729,8 +2730,9 @@ process_ops_to_enqueue(struct ccp_qp *qp, result = -1; } if (unlikely(result < 0)) { - rte_atomic64_add(&b_info->cmd_q->free_slots, - (slots_req - b_info->desccnt)); + rte_atomic_fetch_add_explicit(&b_info->cmd_q->free_slots, + slots_req - b_info->desccnt, + rte_memory_order_seq_cst); break; } b_info->op[i] = op[i];
@@ -2914,7 +2916,8 @@ process_ops_to_dequeue(struct ccp_qp *qp, success: *total_nb_ops = b_info->total_nb_ops; nb_ops = ccp_prepare_ops(qp, op, b_info, nb_ops); - rte_atomic64_add(&b_info->cmd_q->free_slots, b_info->desccnt); + rte_atomic_fetch_add_explicit(&b_info->cmd_q->free_slots, b_info->desccnt, + rte_memory_order_seq_cst); b_info->desccnt = 0; if (b_info->opcnt > 0) { qp->b_info = b_info;
diff --git a/drivers/crypto/ccp/ccp_crypto.h b/drivers/crypto/ccp/ccp_crypto.h
index d0b417ca29..5c61b1582d 100644
--- a/drivers/crypto/ccp/ccp_crypto.h
+++ b/drivers/crypto/ccp/ccp_crypto.h@@ -10,7 +10,7 @@ #include <stdint.h> #include <string.h> -#include <rte_atomic.h> +#include <rte_stdatomic.h> #include <rte_byteorder.h> #include <rte_io.h> #include <rte_pci.h>
diff --git a/drivers/crypto/ccp/ccp_dev.c b/drivers/crypto/ccp/ccp_dev.c
index 5088d8ded6..a75816cdfc 100644
--- a/drivers/crypto/ccp/ccp_dev.c
+++ b/drivers/crypto/ccp/ccp_dev.c@@ -47,14 +47,15 @@ ccp_allot_queue(struct rte_cryptodev *cdev, int slot_req) priv->last_dev = dev; if (dev->qidx >= dev->cmd_q_count) dev->qidx = 0; - ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots); + ret = rte_atomic_load_explicit(&dev->cmd_q[dev->qidx].free_slots, rte_memory_order_relaxed); if (ret >= slot_req) return &dev->cmd_q[dev->qidx]; for (i = 0; i < dev->cmd_q_count; i++) { dev->qidx++; if (dev->qidx >= dev->cmd_q_count) dev->qidx = 0; - ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots); + ret = rte_atomic_load_explicit(&dev->cmd_q[dev->qidx].free_slots, + rte_memory_order_relaxed); if (ret >= slot_req) return &dev->cmd_q[dev->qidx]; }
@@ -583,8 +584,9 @@ ccp_add_device(struct ccp_device *dev) CCP_LOG_ERR("queue doesn't have lsb regions"); cmd_q->lsb = -1; - rte_atomic64_init(&cmd_q->free_slots); - rte_atomic64_set(&cmd_q->free_slots, (COMMANDS_PER_QUEUE - 1)); + rte_atomic_store_explicit(&cmd_q->free_slots, + COMMANDS_PER_QUEUE - 1, + rte_memory_order_seq_cst); /* unused slot barrier b/w H&T */ }
diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h
index cd63830759..0d343c2426 100644
--- a/drivers/crypto/ccp/ccp_dev.h
+++ b/drivers/crypto/ccp/ccp_dev.h@@ -11,7 +11,7 @@ #include <string.h> #include <bus_pci_driver.h> -#include <rte_atomic.h> +#include <rte_stdatomic.h> #include <rte_byteorder.h> #include <rte_io.h> #include <rte_pci.h>
@@ -182,7 +182,7 @@ struct __rte_cache_aligned ccp_queue { struct ccp_device *dev; char memz_name[RTE_MEMZONE_NAMESIZE]; - rte_atomic64_t free_slots; + RTE_ATOMIC(uint64_t) free_slots; /**< available free slots updated from enq/deq calls */ /* Queue identifier */
--
2.53.0