Thread (5 messages) flat view 5 messages, 3 authors, 2021-01-28

Re: [dpdk-dev] [PATCH] net/i40e: fix register setting for hash enable

From: Xing, Beilei <hidden>
Date: 2021-01-27 01:44:34

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-----Original Message-----
From: dapengx.yu@intel.com <redacted>
Sent: Tuesday, January 26, 2021 5:52 PM
To: Xing, Beilei <redacted>; Guo, Jia <redacted>
Cc: dev@dpdk.org; Yu, DapengX <redacted>; stable@dpdk.org
Subject: [PATCH] net/i40e: fix register setting for hash enable

From: Dapeng Yu <redacted>

The original code causes wrong value to be set into PFQF_HENA register
because unnecessary calling to get translated pctype value for X722 NIC. The
result is RSS cannot work.

So remove the unnecessary translation.

Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <redacted>
---
 drivers/net/i40e/i40e_hash.c | 4 ----
 1 file changed, 4 deletions(-)
diff --git a/drivers/net/i40e/i40e_hash.c b/drivers/net/i40e/i40e_hash.c index
9271797a7..b1cb24f43 100644
--- a/drivers/net/i40e/i40e_hash.c
+++ b/drivers/net/i40e/i40e_hash.c
@@ -678,10 +678,6 @@ i40e_hash_enable_pctype(struct i40e_hw *hw,  {
 	uint32_t reg, reg_val, mask;

-	/* For X722, get translated pctype in fd pctype register */
-	if (hw->mac.type == I40E_MAC_X722)
-		pctype = i40e_read_rx_ctl(hw,
I40E_GLQF_FD_PCTYPES(pctype));
-
Did you check the latest X722 datasheet to confirm the behavior?
 	if (pctype < 32) {
 		mask = BIT(pctype);
 		reg = I40E_PFQF_HENA(0);
--
2.27.0
  
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