On Wed, Oct 28, 2020 at 3:09 PM Kevin Laatz [off-list ref] wrote:

On 28/10/2020 12:45, Bruce Richardson wrote:

quoted

According to latest DSA spec[1], the work-queue config register size
should be based off a value read from the WQ capabilities register.
Update driver to read this value and base the start of each WQ config
off that value.

[1] https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html

quoted

Fixes: ff06fa2cf3ba ("raw/ioat: probe idxd PCI")

Signed-off-by: Bruce Richardson <redacted>

Tested-by: Kevin Laatz <redacted>

Applied, thanks.


-- 
David Marchand