Re: [dpdk-dev] [EXT] Re: [PATCH v2 1/2] ethdev: add level support for RSS offload types
From: Kiran Kumar Kokkilagadda <hidden>
Date: 2020-08-14 03:55:30
Subsystem:
library code, the rest · Maintainers:
Andrew Morton, Linus Torvalds
From: Ajit Khaparde <ajit.khaparde@broadcom.com> Sent: Saturday, August 8, 2020 8:10 PM To: Kiran Kumar Kokkilagadda <redacted> Cc: Andrew Rybchenko <redacted>; Ferruh Yigit <redacted>; Thomas Monjalon <redacted>; beilei.xing@intel.com; chas3@att.com; cloud.wangxiaoyun@huawei.com; cristian.dumitrescu@intel.com; dev@dpdk.org; grive@u256.net; hemant.agrawal@nxp.com; humin29@huawei.com; hyonkim@cisco.com; jasvinder.singh@intel.com; Jerin Jacob Kollanukkaran <redacted>; jia.guo@intel.com; jingjing.wu@intel.com; johndale@cisco.com; keith.wiles@intel.com; Liron Himi <redacted>; matan@mellanox.com; Nithin Kumar Dabilpuram <redacted>; orika@mellanox.com; qi.z.zhang@intel.com; qiming.yang@intel.com; rahul.lakkireddy@chelsio.com; Rasesh Mody <rmody@marvell.com>; rosen.xu@intel.com; sachin.saxena@nxp.com; shahafs@mellanox.com; Shahed Shaikh <shshaikh@marvell.com>; somnath.kotur@broadcom.com; viacheslavo@mellanox.com; wei.zhao1@intel.com; xavier.huwei@huawei.com; xuanziyang2@huawei.com; yisen.zhuang@huawei.com; zhouguoyang@huawei.com Subject: [EXT] Re: [dpdk-dev][PATCH v2 1/2] ethdev: add level support for RSS offload types External Email ________________________________ On Sat, Aug 8, 2020 at 7:36 AM <kirankumark@marvell.com<mailto:kirankumark@marvell.com>> wrote: From: Kiran Kumar K <kirankumark@marvell.com<mailto:kirankumark@marvell.com>> This patch reserves 2 bits as input selection to select Inner and outer layers for RSS computation. It is combined with existing ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4. How do you plan to use this? Do you need to make any changes to testpmd? I will update in the next version. This functionality already exists in rte_flow through level parameter in RSS action configuration rte_flow_action_rss. Signed-off-by: Kiran Kumar K <kirankumark@marvell.com<mailto:kirankumark@marvell.com>> --- v2 changes: * Reserved bit 50 & 51 lib/librte_ethdev/rte_ethdev.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h@@ -552,6 +552,33 @@ struct rte_eth_rss_conf { #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53) #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52) +/* + * We use the following macros to combine with the above layers to choose + * inner and outer layers or both for RSS computation. + * Note: Default is 0: inner layers, 1: outer layers, 2: both + * bit 50 and 51 are reserved for this. + */ + +/** + * Level 0, It basically stands for the innermost encapsulation level RSS + * can be performed on according to PMD and device capabilities. + */ +#define ETH_RSS_LEVEL_INNER (0ULL << 50) +/** + * Level 1, It basically stands for the outermost encapsulation level RSS + * can be performed on according to PMD and device capabilities. + */ +#define ETH_RSS_LEVEL_OUTER (1ULL << 50) +/** + * Level 2, It basically stands for the both inner and outermost + * encapsulation level RSS can be performed on according to PMD and + * device capabilities. + */ +#define ETH_RSS_LEVEL_INNER_OUTER (2ULL << 50) +#define ETH_RSS_LEVEL_MASK (3ULL << 50) + +#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50) + /** * For input set change of hash filter, if SRC_ONLY and DST_ONLY of * the same level are used simultaneously, it is the same case as --
2.25.1