The metadata register c0 field in the matcher might be split into two
independent fields - the source vport index and META item value. These
fields have no permanent assigned bits, the configuration is queried from the
kernel drivers.

MLX5_SET configures the specified 32-bit field as whole entity.
For metadata register c0 we should take into account the provided mask in
order to configure the specified subfield bits only.

Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <redacted>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c

b/drivers/net/mlx5/mlx5_flow_dv.c index 4c16281..893db3e 100644

--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c

@@ -5742,6 +5742,7 @@ struct field_modify_info modify_tcp[] = {
 		MLX5_ADDR_OF(fte_match_param, matcher,

misc_parameters_2);
 	void *misc2_v =
 		MLX5_ADDR_OF(fte_match_param, key,
misc_parameters_2);
+	uint32_t temp;

 	data &= mask;
 	switch (reg_type) {

@@ -5754,8 +5755,18 @@ struct field_modify_info modify_tcp[] = {
 		MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b,

data);
 		break;
 	case REG_C_0:
-		MLX5_SET(fte_match_set_misc2, misc2_m,
metadata_reg_c_0, mask);
-		MLX5_SET(fte_match_set_misc2, misc2_v,
metadata_reg_c_0, data);
+		/*
+		 * The metadata register C0 field might be divided into
+		 * source vport index and META item value, we should set
+		 * this field accorfing to specified mask, not as whole one.
+		 */