[PATCH v5 03/29] eal/tile: define I/O device memory barriers for tile
From: Jerin Jacob <hidden>
Date: 2017-01-18 01:22:26
Subsystem:
library code, the rest · Maintainers:
Andrew Morton, Linus Torvalds
The patch does not provide any functional change for tile. I/O barriers are mapped to existing smp barriers. CC: Zhigang Lu <redacted> Signed-off-by: Jerin Jacob <redacted> --- lib/librte_eal/common/include/arch/tile/rte_atomic.h | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
index 28825ff..1f332ee 100644
--- a/lib/librte_eal/common/include/arch/tile/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/tile/rte_atomic.h@@ -85,6 +85,12 @@ static inline void rte_rmb(void) #define rte_smp_rmb() rte_compiler_barrier() +#define rte_io_mb() rte_mb() + +#define rte_io_wmb() rte_compiler_barrier() + +#define rte_io_rmb() rte_compiler_barrier() + #ifdef __cplusplus } #endif
--
2.5.5