Dear Xilinx team,

On Thu, Dec 21, 2017 at 3:33 AM, Vinod Koul [off-list ref] wrote:

On Wed, Dec 20, 2017 at 07:27:16PM +0100, Michal Simek wrote:

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Hi Vinod,

Hey Michal,

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On 20.12.2017 18:05, Vinod Koul wrote:

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On Wed, Dec 20, 2017 at 02:00:18PM +0530, Vishal Sagar wrote:

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The Video Framebuffer IP is available in two forms: read or write.
This driver supports either form of the IP.
Each IP is a single channel DMA and is video format aware.
It can read/write video data arranged from/to memory as packed or
semi-planar way based on the selected video format.
To get list of supported video formats, clients can call certain
APIs exposed by the driver. This driver introduces support for
these IPs and integrates with the DMA Engine Framework.

The subsytem name is dmaengine!

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Signed-off-by: Radhey Shyam Pandey <redacted>
Signed-off-by: John Nichols <redacted>
Signed-off-by: Jeffrey Mouroux <redacted>
Signed-off-by: Michal Simek <redacted>
Signed-off-by: Hyun Kwon <redacted>
Signed-off-by: Vishal Sagar <redacted>
---
 drivers/dma/Kconfig                |   14 +-
 drivers/dma/xilinx/Makefile        |    1 +
 drivers/dma/xilinx/xilinx_frmbuf.c | 1155 ++++++++++++++++++++++++++++++++++++

<snip>

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+// SPDX-License-Identifier: GPL-2.0

Copyright needs to follow this in C99 style

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+/*
+ * DMAEngine driver for Xilinx Framebuffer IP
+ *
+ * Copyright (C) 2016 - 2017 Xilinx, Inc. All rights reserved.
+ *
+ * Authors: Radhey Shyam Pandey [off-list ref]
+ *          John Nichols [off-list ref]
+ *          Jeffrey Mouroux [off-list ref]
+ *
+ * Based on the Freescale DMA driver.
+ *
+ * Description:
+ * The AXI Framebuffer core is a soft Xilinx IP core that
+ * provides high-bandwidth direct memory access between memory
+ * and AXI4-Stream.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.

why do you need this license text? With SPDX tag this is implied..

We are in touch with Xilinx Legal to clear this if SPDX is enough.
We have been discussing this recently here.
https://lkml.org/lkml/2017/12/18/112

I will let you know when we have this discussion done. Right now I have
recommended to add SPDX header and also license text fragment which was
present in driver version added to Xilinx git tree.

Been there done that :) I was adding soundwire subsystem and went thru same
hoops and finally had to remov the text, so it would help if you can remove.

Adding Philippe for his comments.

Vinod,
Thank you.

Michal, and other from Xilinx:

The whole point of the SPDX tags is to eschew the legalese with
something that is equivalent. It has been discussed among maintainers
and reviewed by LG legal and several other legal teams. It is
acceptable to several large orgs like Intel FWIW.

It would be nice if your org contributions do not stand out with big
warts of long legalese while every one else is going in the agreed
opposite direction. Unless your are legalese lovers of course, but
then I do not think the kernel needs more license boilerplate and less
code, to the contrary  ;)

Please feel free to point your legal team to me and Greg directly if
they have concerns that we can resolve off list.

Please check the doc patches from Thomas for details [0]
See also some of Linus comments on related topics [1] [2] [3] [4] [5]

CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CC: Thomas Gleixner <redacted>

[0] https://lkml.org/lkml/2017/12/4/934
[1] https://lkml.org/lkml/2017/11/25/133
[2] https://lkml.org/lkml/2017/11/25/125
[3] https://lkml.org/lkml/2017/11/2/715
[4] https://lkml.org/lkml/2017/11/2/805