Hi all,

-----Original Message-----
From: iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
Sent: Wednesday, August 24, 2022 10:51 AM
To: Pavel Machek <redacted>; Lad Prabhakar
[off-list ref]
Cc: cip-dev@lists.cip-project.org; Biju Das <biju.das.jz@bp.renesas.com>
Subject: RE: [PATCH 5.10.y-cip] arm64: dts: renesas: r9a07g054l2-smarc:
Correct SoC name in comment

Hi all,

quoted

-----Original Message-----
From: Pavel Machek <redacted>
Sent: Monday, August 22, 2022 10:06 PM
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯

Ａ

quoted

ＣＴ) [off-list ref]; Pavel Machek

[off-list ref];

quoted

Biju Das [off-list ref]
Subject: Re: [PATCH 5.10.y-cip] arm64: dts: renesas: r9a07g054l2-smarc:
Correct SoC name in comment

Hi!

quoted

From: Chris Paterson <redacted>

commit d1273f541ab409242e08da6bb836bb564021274c upstream.

This dts is for the RZ/V2L SMARC EVK, not RZ/G2L.

A bit trivial, but looks ok to me. I can apply it if there are no other comments.

LGTM too.
I could not find Pavel's test, so I am running in following pilpeline:
  https://gitlab.com/cip-project/cip-kernel/linux-cip/-/pipelines/621098021

If test is OK, I will apply this.

The test looks good. I just pushed.

Best regards,
  Nobuhiro