RE: [PATCH 5.10.y-cip 04/22] pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
From: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: 2021-12-22 10:55:01
From: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: 2021-12-22 10:55:01
Hi Pavel, Thank you for the review.
-----Original Message----- From: Pavel Machek <redacted> Sent: 22 December 2021 09:48 To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <redacted>; Pavel Machek [off-list ref]; Biju Das [off-list ref] Subject: Re: [PATCH 5.10.y-cip 04/22] pinctrl: renesas: Add RZ/G2L pin and gpio controller driver Hi!quoted
Add support for pin and gpio controller driver for RZ/G2L SoC. Based on a patch in the BSP by Hien Huynh [off-list ref].quoted
+static int rzg2l_map_add_config(struct pinctrl_map *map, + const char *group_or_pin, + enum pinctrl_map_type type, + unsigned long *configs, + unsigned int num_configs) +{ + unsigned long *cfgs; + + cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), + GFP_KERNEL);Should we check for overflows here, too?
num_configs should take care while accessing the cfg. Cheers, Prabhakar