--- v6
+++ v3
@@ -1,25 +1,27 @@
From: Stefan Chulski <stefanc@marvell.com>
-To support Flow Control ring size should be at least 1024 descriptors.
+This patch fix GMAC TX flow control autoneg.
+Flow control autoneg wrongly were disabled with enabled TX
+flow control.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
---
- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 ++
- 1 file changed, 2 insertions(+)
+ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
-index 7632810..98849b0 100644
+index 15974a7..55138c7 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
-@@ -4543,6 +4543,8 @@ static int mvpp2_check_ringparam_valid(struct net_device *dev,
+@@ -6284,7 +6284,7 @@ static void mvpp2_gmac_config(struct mvpp2_port *port, unsigned int mode,
+ old_ctrl4 = ctrl4 = readl(port->base + MVPP22_GMAC_CTRL_4_REG);
- if (ring->rx_pending > MVPP2_MAX_RXD_MAX)
- new_rx_pending = MVPP2_MAX_RXD_MAX;
-+ else if (ring->rx_pending < MSS_THRESHOLD_START)
-+ new_rx_pending = MSS_THRESHOLD_START;
- else if (!IS_ALIGNED(ring->rx_pending, 16))
- new_rx_pending = ALIGN(ring->rx_pending, 16);
+ ctrl0 &= ~MVPP2_GMAC_PORT_TYPE_MASK;
+- ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK);
++ ctrl2 &= ~(MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK | MVPP2_GMAC_FLOW_CTRL_MASK);
+ /* Configure port type */
+ if (phy_interface_mode_is_8023z(state->interface)) {
--
1.9.1