--- v11
+++ vrfc
@@ -3,24 +3,38 @@
CM3 SRAM address space would be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
-Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
+ arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
-index 9dcf16b..6fe0d26 100644
+index 9dcf16b..359cf42 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
-@@ -59,7 +59,7 @@
+@@ -69,6 +69,8 @@
+ status = "disabled";
+ dma-coherent;
- CP11X_LABEL(ethernet): ethernet@0 {
- compatible = "marvell,armada-7k-pp22";
-- reg = <0x0 0x100000>, <0x129000 0xb000>;
-+ reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
- clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
- <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
- <&CP11X_LABEL(clk) 1 18>;
++ cm3-mem = <&CP11X_LABEL(cm3_sram)>;
++
+ CP11X_LABEL(eth0): eth0 {
+ interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
+ <43 IRQ_TYPE_LEVEL_HIGH>,
+@@ -211,6 +213,14 @@
+ };
+ };
+
++ CP11X_LABEL(cm3_sram): cm3@220000 {
++ compatible = "mmio-sram";
++ reg = <0x220000 0x800>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges = <0 0x220000 0x800>;
++ };
++
+ CP11X_LABEL(rtc): rtc@284000 {
+ compatible = "marvell,armada-8k-rtc";
+ reg = <0x284000 0x20>, <0x284080 0x24>;
--
1.9.1