[PATCH net] octeontx2-af: nix: Fix TX vtag upper bits programming
From: Ratheesh Kannoth <rkannoth@marvell.com>
Date: 2026-09-15 07:31:18
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Subsystem:
marvell octeontx2 rvu admin function driver, networking drivers, the rest · Maintainers:
Sunil Goutham, Ratheesh Kannoth, Geetha sowjanya, Subbaraya Sundeep, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
From: Subbaraya Sundeep <sbhatta@marvell.com>
The upper bits of the vtag value above bit 47 were not written to
NIX_AF_TX_VTAG_DEFX_DATA, causing incorrect TX VLAN tag insertion
when extended vtag fields are used.
Fixes: 9a946def264d ("octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entries")
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
---
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 153eb57bad06..091ef8dac7c9 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c@@ -3107,6 +3107,7 @@ static int nix_tx_vtag_alloc(struct rvu *rvu, int blkaddr, mutex_unlock(&vlan->rsrc_lock); regval = size ? vtag : vtag << 32; + regval |= (vtag & ~GENMASK_ULL(47, 0)) << 48; rvu_write64(rvu, blkaddr, NIX_AF_TX_VTAG_DEFX_DATA(index), regval);
--
2.43.0