[PATCH v2] dt-bindings: net: ti,davinci-emac: Convert to DT schema
From: Bhargav Joshi <hidden>
Date: 2026-08-17 23:31:13
Also in:
linux-devicetree, lkml
Subsystem:
networking drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Convert Texas Instruments DaVinci EMAC binding from text to DT schema. Changes from the original binding: - Add clocks, clock-names, syscon, power-domains, and ti,hwmods properties that are used in existing DTS files but were undocumented. - Disallow syscon and clock-names for ti,davinci-dm6467-emac since they are not applicable to that SoC. - Allow 1-2 reg entries (DM816 uses two). - Make clocks a required property as driver probe fails without it. - Mark ti,hwmods as deprecated. Signed-off-by: Bhargav Joshi <redacted> --- Changes in v2: - Remove original text binding that was left in v1 - Link to v1: https://lore.kernel.org/r/20260817-ti-davinci-emac-v1-1-022678d966e9@gmail.com (local) --- .../devicetree/bindings/net/davinci_emac.txt | 44 -------- .../devicetree/bindings/net/ti,davinci-emac.yaml | 113 +++++++++++++++++++++ 2 files changed, 113 insertions(+), 44 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/davinci_emac.txt b/Documentation/devicetree/bindings/net/davinci_emac.txt
deleted file mode 100644
index 5e3579e72e2d..000000000000
--- a/Documentation/devicetree/bindings/net/davinci_emac.txt
+++ /dev/null@@ -1,44 +0,0 @@ -* Texas Instruments Davinci EMAC - -This file provides information, what the device node -for the davinci_emac interface contains. - -Required properties: -- compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or - "ti,dm816-emac" -- reg: Offset and length of the register set for the device -- ti,davinci-ctrl-reg-offset: offset to control register -- ti,davinci-ctrl-mod-reg-offset: offset to control module register -- ti,davinci-ctrl-ram-offset: offset to control module ram -- ti,davinci-ctrl-ram-size: size of control module ram -- interrupts: interrupt mapping for the davinci emac interrupts sources: - 4 sources: <Receive Threshold Interrupt - Receive Interrupt - Transmit Interrupt - Miscellaneous Interrupt> - -Optional properties: -- phy-handle: See ethernet.txt file in the same directory. - If absent, davinci_emac driver defaults to 100/FULL. -- ti,davinci-rmii-en: 1 byte, 1 means use RMII -- ti,davinci-no-bd-ram: boolean, does EMAC have BD RAM? - -The MAC address will be determined using the optional properties -defined in ethernet.txt. - -Example (enbw_cmc board): - eth0: emac@1e20000 { - compatible = "ti,davinci-dm6467-emac"; - reg = <0x220000 0x4000>; - ti,davinci-ctrl-reg-offset = <0x3000>; - ti,davinci-ctrl-mod-reg-offset = <0x2000>; - ti,davinci-ctrl-ram-offset = <0>; - ti,davinci-ctrl-ram-size = <0x2000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 - 34 - 35 - 36 - >; - interrupt-parent = <&intc>; - };
diff --git a/Documentation/devicetree/bindings/net/ti,davinci-emac.yaml b/Documentation/devicetree/bindings/net/ti,davinci-emac.yaml
new file mode 100644
index 000000000000..cb1394f6f2d4
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ti,davinci-emac.yaml@@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ti,davinci-emac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DaVinci EMAC Ethernet Controller + +maintainers: + - Tony Lindgren <tony@atomide.com> + +properties: + compatible: + enum: + - ti,davinci-dm6467-emac + - ti,am3517-emac + - ti,dm816-emac + + reg: + minItems: 1 + maxItems: 2 + + interrupts: + items: + - description: Receive Threshold + - description: Receive + - description: Transmit + - description: Miscellaneous + + clocks: + maxItems: 1 + + clock-names: + const: ick + + ti,davinci-ctrl-reg-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: offset to control register + + ti,davinci-ctrl-mod-reg-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: offset to control module register + + ti,davinci-ctrl-ram-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: offset to control module ram + + ti,davinci-ctrl-ram-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: size of control module ram + + ti,davinci-rmii-en: + $ref: /schemas/types.yaml#/definitions/uint8 + description: Set to 1 to enable RMII (Reduced MII) mode. + + ti,davinci-no-bd-ram: + type: boolean + description: + Indicates that the EMAC does not have on-chip buffer descriptor RAM. + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to a syscon node providing access to the System Control + Module (SCM) registers. Used on AM3517 and DM816x to read + factory-programmed MAC addresses from eFuse registers. + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: TI hwmod name + deprecated: true + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - ti,davinci-ctrl-reg-offset + - ti,davinci-ctrl-mod-reg-offset + - ti,davinci-ctrl-ram-offset + - ti,davinci-ctrl-ram-size + - clocks + +allOf: + - $ref: ethernet-controller.yaml# + - if: + properties: + compatible: + contains: + const: ti,davinci-dm6467-emac + then: + properties: + syscon: false + clock-names: false + +unevaluatedProperties: false + +examples: + - | + ethernet@220000 { + compatible = "ti,davinci-dm6467-emac"; + reg = <0x220000 0x4000>; + ti,davinci-ctrl-reg-offset = <0x3000>; + ti,davinci-ctrl-mod-reg-offset = <0x2000>; + ti,davinci-ctrl-ram-offset = <0>; + ti,davinci-ctrl-ram-size = <0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33>, <34>, <35>, <36>; + clocks = <&psc1 5>; + power-domains = <&psc1 5>; + };
--- base-commit: 8d3ae59288f1e7d58d76558a6ee96d533bc5019f change-id: 20260817-ti-davinci-emac-7ec97feca43e Best regards, -- Bhargav