[PATCH net-next 0/4] net: dsa: Add NXP i.MX RT1180 NETC switch support

@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/nxp,imxrt1180-netc-switch.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX RT1180 NETC Ethernet Switch
+
+description: |
+  The NXP i.MX RT1180 integrates a TSN-capable NETC Ethernet switch.
+
+  The i.MX RT1180 is an MCU and does not run Linux. In heterogeneous multi-SoC
+  systems, the RT1180 runs firmware that manages the switch, while the host SoC
+  runs Linux and exposes the switch ports using the DSA framework, with a
+  dedicated CPU (conduit) port connected to a host Ethernet controller.
+
+  The switch control plane is accessed through a management link to the
+  companion MCU. Current systems may use SPI, but other transports may be used
+  in the future (for example, in-band management over an Ethernet port).
+
+maintainers:
+  - Minghuan Lian <minghuan.lian@nxp.com>
+
+allOf:
+  # Base: always a DSA switch
+  - $ref: /schemas/net/dsa/dsa.yaml#
+
+  # If the SPI-specific compatible is used, allow SPI properties and require reg.
+  - if:
+      properties:
+        compatible:
+          type: array
+          contains:
+            const: nxp,imxrt1180-netc-switch-spi
+    then:
+      $ref: /schemas/spi/spi-peripheral-props.yaml#
+      required:
+        - reg
+
+properties:
+  compatible:
+    oneOf:
+      # SPI-attached switch representation (current integration)
+      - items:
+          - const: nxp,imxrt1180-netc-switch-spi
+          - const: nxp,imxrt1180-netc-switch
+      # Transport-agnostic representation (future integration)
+      - const: nxp,imxrt1180-netc-switch
+
+  reg:
+    description: |
+      SPI chip select number (only for SPI-attached deployments).
+    maxItems: 1
+
+required:
+  - compatible
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethernet-switch@0 {
+            compatible = "nxp,imxrt1180-netc-switch-spi",
+                         "nxp,imxrt1180-netc-switch";
+            reg = <0>;
+            spi-max-frequency = <12000000>;
+
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                    reg = <0>;
+                    label = "hms0p0";
+                    phy-mode = "internal";
+                    fixed-link {
+                        speed = <100>;
+                        full-duplex;
+                    };
+                };
+
+                port@1 {
+                    reg = <1>;
+                    label = "hms0p1";
+                    phy-mode = "internal";
+                    fixed-link {
+                        speed = <1000>;
+                        full-duplex;
+                    };
+                };
+
+                port@2 {
+                    reg = <2>;
+                    label = "hms0p2";
+                    phy-mode = "internal";
+                    fixed-link {
+                        speed = <1000>;
+                        full-duplex;
+                    };
+                };
+
+                port@3 {
+                    reg = <3>;
+                    label = "cpu";
+                    ethernet = <&eth0>;
+                    phy-mode = "internal";
+                    fixed-link {
+                        speed = <1000>;
+                        full-duplex;
+                    };
+                };
+            };
+        };
+    };

@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2025-2026 NXP
+ */
+
+#ifndef _NET_DSA_TAG_HMS_H
+#define _NET_DSA_TAG_HMS_H
+
+#include <linux/dsa/8021q.h>
+#include <net/dsa.h>
+
+#define ETH_P_HMS_8021Q	ETH_P_8021Q /* 0x8100 */
+
+#define HMS_META_ETYPE	0xDADC /* HMS internal meta frame EtherType */
+
+/* IEEE 802.3 Annex 57A: Slow Protocols PDUs (01:80:C2:xx:xx:xx) */
+#define HMS_LINKLOCAL_FILTER_A		0x0180C2000000ull
+#define HMS_LINKLOCAL_FILTER_A_MASK	0xFFFFFF000000ull
+/* IEEE 1588 Annex F: Transport of PTP over Ethernet (01:1B:19:xx:xx:xx) */
+#define HMS_LINKLOCAL_FILTER_B		0x011B19000000ull
+#define HMS_LINKLOCAL_FILTER_B_MASK	0xFFFFFF000000ull
+
+struct hms_tagger_data {
+	void (*meta_cmd_handler)(struct dsa_switch *ds, int port,
+				 void *buf, size_t len);
+};
+
+#endif /* _NET_DSA_TAG_HMS_H */

@@ -58,6 +58,7 @@ struct tc_action;
 #define DSA_TAG_PROTO_YT921X_VALUE		30
 #define DSA_TAG_PROTO_MXL_GSW1XX_VALUE		31
 #define DSA_TAG_PROTO_MXL862_VALUE		32
+#define DSA_TAG_PROTO_HMS_VALUE			33
 
 enum dsa_tag_protocol {
 	DSA_TAG_PROTO_NONE		= DSA_TAG_PROTO_NONE_VALUE,

@@ -93,6 +94,7 @@ enum dsa_tag_protocol {
 	DSA_TAG_PROTO_YT921X		= DSA_TAG_PROTO_YT921X_VALUE,
 	DSA_TAG_PROTO_MXL_GSW1XX	= DSA_TAG_PROTO_MXL_GSW1XX_VALUE,
 	DSA_TAG_PROTO_MXL862		= DSA_TAG_PROTO_MXL862_VALUE,
+	DSA_TAG_PROTO_HMS		= DSA_TAG_PROTO_HMS_VALUE,
 };
 
 struct dsa_switch;

@@ -211,4 +211,13 @@ config NET_DSA_TAG_YT921X
 	  Say Y or M if you want to enable support for tagging frames for
 	  Motorcomm YT921x switches.
 
+config NET_DSA_TAG_HMS
+	tristate "Tag driver for NXP Heterogeneous Multi-SoC switches"
+	select NET_DSA_TAG_8021Q
+	help
+	  Say Y or M if you want to enable support for tagging frames for
+	  NXP Heterogeneous Multi-SoC switch family. This driver uses a
+	  custom 802.1Q VLAN header for injection and extraction of frames
+	  between the host and the NXP i.MX RT1180 NETC switch.
+
 endif

@@ -42,6 +42,7 @@ obj-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o
 obj-$(CONFIG_NET_DSA_TAG_VSC73XX_8021Q) += tag_vsc73xx_8021q.o
 obj-$(CONFIG_NET_DSA_TAG_XRS700X) += tag_xrs700x.o
 obj-$(CONFIG_NET_DSA_TAG_YT921X) += tag_yt921x.o
+obj-$(CONFIG_NET_DSA_TAG_HMS) += tag_hms.o
 
 # for tracing framework to find trace.h
 CFLAGS_trace.o := -I$(src)

@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2025-2026 NXP
+ */
+
+#include <linux/if_vlan.h>
+#include <linux/dsa/tag_hms.h>
+#include <linux/packing.h>
+#include <linux/slab.h>
+#include "tag.h"
+#include "tag_8021q.h"
+
+#define HMS_TAG_NAME		"hms"
+
+/*
+ * HMS meta header inserted after the source MAC address.
+ *
+ * |     2B      |     2B      |   0 / 4B / 8B / 12B / 16B / 20B |
+ * +------------ +-------------+---------------------------------+
+ * |    0xDADC   |   HEADER    |               DATA              |
+ * +------------ +------------ +---------------------------------+
+ */
+
+#define HMS_HEADER_LEN			4
+
+#define HMS_HEADER_HOST_TO_SWITCH	BIT(15)
+
+/* Binary structure of the HMS Header ETH_P_HMS_META:
+ *
+ * |   15      |  14  |     13    |   12  |  11   | 10 - 9 |   7 - 4   |  3 - 0  |
+ * +-----------+------+-----------+-------+-------+--------+-----------+---------+
+ * | TO HOST 0 | META | HOST Only |       |       |        | Switch ID | Port ID |
+ * +-----------+------+-----------+-------+-------+--------+-----------+---------+
+ */
+#define HMS_RX_HEADER_IS_METADATA	BIT(14)
+#define HMS_RX_HEADER_HOST_ONLY		BIT(13)
+
+#define HMS_HEADER_PORT_MASK		0x0F
+#define HMS_HEADER_SWITCH_MASK		0xF0
+#define HMS_HEADER_SWITCH_OFFSET	4
+#define HMS_RX_HEADER_PORT_ID(x)	((x) & HMS_HEADER_PORT_MASK)
+#define HMS_RX_HEADER_SWITCH_ID(x)	(((x) & HMS_HEADER_SWITCH_MASK) >> HMS_HEADER_SWITCH_OFFSET)
+
+/* TX header */
+
+/*
+ * Binary structure of the HMS Header ETH_P_HMS_META:
+ *
+ * |   15      |  14  |   13   |   12  |  11     | 10 - 9 |  7 - 4    |  3 - 0  |
+ * +-----------+------+--------+-------+---------+--------+-----------+---------+
+ * |  To SW 1  | META |        |       |         |        | SWITCH ID | PORT ID |
+ * +-----------+------+--------+-------+------  -+--------+-----------+---------+
+ */
+
+#define HMS_TX_HEADER_SWITCHID(x)	(((x) << HMS_HEADER_SWITCH_OFFSET) & HMS_HEADER_SWITCH_MASK)
+#define HMS_TX_HEADER_DESTPORTID(x)	((x) & HMS_HEADER_PORT_MASK)
+
+/* Similar to is_link_local_ether_addr(hdr->h_dest) but also covers PTP */
+static inline bool hms_is_link_local(const struct sk_buff *skb)
+{
+	const struct ethhdr *hdr = eth_hdr(skb);
+	u64 dmac = ether_addr_to_u64(hdr->h_dest);
+
+	if (ntohs(hdr->h_proto) == HMS_META_ETYPE)
+		return true;
+
+	if ((dmac & HMS_LINKLOCAL_FILTER_A_MASK) ==
+	     HMS_LINKLOCAL_FILTER_A)
+		return true;
+
+	if ((dmac & HMS_LINKLOCAL_FILTER_B_MASK) ==
+	     HMS_LINKLOCAL_FILTER_B)
+		return true;
+
+	return false;
+}
+
+/* Send VLAN tags with a TPID that blends in with whatever VLAN protocol a
+ * bridge spanning ports of this switch might have.
+ */
+static u16 hms_xmit_tpid(struct dsa_port *dp)
+{
+	struct dsa_switch *ds = dp->ds;
+	struct dsa_port *other_dp;
+	u16 proto;
+
+	if (!dsa_port_is_vlan_filtering(dp))
+		return ETH_P_HMS_8021Q;
+
+	/* Port is VLAN-aware, so there is a bridge somewhere (a single one,
+	 * we're sure about that). It may not be on this port though, so we
+	 * need to find it.
+	 */
+	dsa_switch_for_each_port(other_dp, ds) {
+		struct net_device *br = dsa_port_bridge_dev_get(other_dp);
+
+		if (!br)
+			continue;
+
+		/* Error is returned only if CONFIG_BRIDGE_VLAN_FILTERING,
+		 * which seems pointless to handle, as our port cannot become
+		 * VLAN-aware in that case.
+		 */
+		br_vlan_get_proto(br, &proto);
+
+		return proto;
+	}
+
+	WARN_ONCE(1, "Port is VLAN-aware but cannot find associated bridge!\n");
+
+	return ETH_P_HMS_8021Q;
+}
+
+static struct sk_buff *hms_imprecise_xmit(struct sk_buff *skb,
+					  struct net_device *netdev)
+{
+	struct dsa_port *dp = dsa_user_to_port(netdev);
+	unsigned int bridge_num = dsa_port_bridge_num_get(dp);
+	struct net_device *br = dsa_port_bridge_dev_get(dp);
+	u16 tx_vid;
+
+	/* If the port is under a VLAN-aware bridge, just slide the
+	 * VLAN-tagged packet into the FDB and hope for the best.
+	 * This works because we support a single VLAN-aware bridge
+	 * across the entire dst, and its VLANs cannot be shared with
+	 * any standalone port.
+	 */
+	if (br_vlan_enabled(br))
+		return skb;
+
+	/* If the port is under a VLAN-unaware bridge, use an imprecise
+	 * TX VLAN that targets the bridge's entire broadcast domain,
+	 * instead of just the specific port.
+	 */
+	tx_vid = dsa_tag_8021q_bridge_vid(bridge_num);
+
+	if (unlikely(skb_vlan_tag_present(skb))) {
+		skb = __vlan_hwaccel_push_inside(skb);
+		if (!skb) {
+			WARN_ONCE(1, "Failed to push VLAN tag to payload!\n");
+			return NULL;
+		}
+	}
+
+	return dsa_8021q_xmit(skb, netdev, hms_xmit_tpid(dp), tx_vid);
+}
+
+static struct sk_buff *hms_meta_xmit(struct sk_buff *skb,
+				     struct net_device *netdev)
+{
+	struct dsa_port *dp = dsa_user_to_port(netdev);
+	int len = HMS_HEADER_LEN;
+	__be16 *tx_header;
+
+	skb_push(skb, len);
+
+	dsa_alloc_etype_header(skb, len);
+
+	tx_header = dsa_etype_header_pos_tx(skb);
+
+	tx_header[0] = htons(HMS_META_ETYPE);
+	tx_header[1] = htons(HMS_HEADER_HOST_TO_SWITCH |
+			     HMS_TX_HEADER_SWITCHID(dp->ds->index) |
+			     HMS_TX_HEADER_DESTPORTID(dp->index));
+
+	return skb;
+}
+
+static struct sk_buff *hms_8021q_xmit(struct sk_buff *skb,
+				      struct net_device *netdev)
+{
+	struct dsa_port *dp = dsa_user_to_port(netdev);
+	u16 queue_mapping = skb_get_queue_mapping(skb);
+	u8 pcp = netdev_txq_to_tc(netdev, queue_mapping);
+	u16 tx_vid = dsa_tag_8021q_standalone_vid(dp);
+
+	return dsa_8021q_xmit(skb, netdev, hms_xmit_tpid(dp),
+			      ((pcp << VLAN_PRIO_SHIFT) | tx_vid));
+}
+
+static struct sk_buff *hms_xmit(struct sk_buff *skb,
+				struct net_device *netdev)
+{
+	if (skb->offload_fwd_mark)
+		return hms_imprecise_xmit(skb, netdev);
+
+	if (unlikely(hms_is_link_local(skb)))
+		return hms_meta_xmit(skb, netdev);
+
+	return hms_8021q_xmit(skb, netdev);
+}
+
+static bool hms_skb_has_tag_8021q(const struct sk_buff *skb)
+{
+	u16 tpid = ntohs(eth_hdr(skb)->h_proto);
+
+	return tpid == ETH_P_8021AD || tpid == ETH_P_8021Q ||
+	       skb_vlan_tag_present(skb);
+}
+
+static bool hms_skb_has_inband_control_extension(const struct sk_buff *skb)
+{
+	return ntohs(eth_hdr(skb)->h_proto) == HMS_META_ETYPE;
+}
+
+static struct sk_buff *hms_rcv_meta_cmd(struct sk_buff *skb, u16 rx_header)
+{
+	u8 *buf = dsa_etype_header_pos_rx(skb) + HMS_HEADER_LEN;
+	int switch_id = HMS_RX_HEADER_SWITCH_ID(rx_header);
+	int source_port = HMS_RX_HEADER_PORT_ID(rx_header);
+	struct hms_tagger_data *tagger_data;
+	struct net_device *master = skb->dev;
+	struct dsa_port *cpu_dp;
+	struct dsa_switch *ds;
+
+	cpu_dp = master->dsa_ptr;
+	ds = dsa_switch_find(cpu_dp->dst->index, switch_id);
+	if (!ds) {
+		net_err_ratelimited("%s: cannot find switch id %d\n",
+				    master->name, switch_id);
+		return NULL;
+	}
+
+	tagger_data = ds->tagger_data;
+	if (!tagger_data->meta_cmd_handler)
+		return NULL;
+
+	if (skb_is_nonlinear(skb))
+		if (skb_linearize(skb))
+			return NULL;
+
+	tagger_data->meta_cmd_handler(ds, source_port, buf,
+				skb->len - HMS_HEADER_LEN - 2 * ETH_ALEN);
+
+	/* Discard the meta frame */
+	return NULL;
+}
+
+static struct sk_buff *hms_rcv_inband_control_extension(struct sk_buff *skb,
+							int *source_port,
+							int *switch_id,
+							bool *host_only)
+{
+	u16 rx_header;
+	int len = 0;
+
+	if (unlikely(!pskb_may_pull(skb, HMS_HEADER_LEN)))
+		return NULL;
+
+	rx_header = ntohs(*(__be16 *)skb->data);
+	if (rx_header & HMS_RX_HEADER_HOST_ONLY)
+		*host_only = true;
+
+	if (rx_header & HMS_RX_HEADER_IS_METADATA)
+		return hms_rcv_meta_cmd(skb, rx_header);
+
+	*source_port = HMS_RX_HEADER_PORT_ID(rx_header);
+	*switch_id = HMS_RX_HEADER_SWITCH_ID(rx_header);
+
+	len += HMS_HEADER_LEN;
+
+	/* Advance skb->data past the DSA header */
+	skb_pull_rcsum(skb, len);
+
+	dsa_strip_etype_header(skb, len);
+
+	/* With skb->data in its final place, update the MAC header
+	 * so that eth_hdr() continues to works properly.
+	 */
+	skb_set_mac_header(skb, -ETH_HLEN);
+
+	return skb;
+}
+
+/* If the VLAN in the packet is a tag_8021q one, set @source_port and
+ * @switch_id and strip the header. Otherwise set @vid and keep it in the
+ * packet.
+ */
+static void hms_vlan_rcv(struct sk_buff *skb, int *source_port,
+			 int *switch_id, int *vbid, int *vid)
+{
+	dsa_8021q_rcv(skb, source_port, switch_id, vbid, vid);
+}
+
+static struct sk_buff *hms_rcv(struct sk_buff *skb,
+			       struct net_device *netdev)
+{
+	int src_port = -1, switch_id = -1, vbid = -1, vid = -1;
+	bool host_only = false;
+
+	if (hms_skb_has_inband_control_extension(skb)) {
+		skb = hms_rcv_inband_control_extension(skb, &src_port,
+						       &switch_id,
+						       &host_only);
+		if (!skb)
+			return NULL;
+	}
+
+	/* Packets with in-band control extensions might still have RX VLANs */
+	if (likely(hms_skb_has_tag_8021q(skb)))
+		hms_vlan_rcv(skb, &src_port, &switch_id, &vbid, &vid);
+
+	if (src_port == -1) /* Need to check it - bridge mode */
+		return NULL;
+
+	skb->dev = dsa_tag_8021q_find_user(netdev, src_port, switch_id,
+					   vid, vbid);
+	if (!skb->dev) {
+		/* netdev_warn(netdev, "Couldn't decode source port\n"); */
+		return NULL;
+	}
+
+	if (!host_only)
+		dsa_default_offload_fwd_mark(skb);
+
+	return skb;
+}
+
+static void hms_disconnect(struct dsa_switch *ds)
+{
+	struct hms_tagger_data *tagger_data = ds->tagger_data;
+
+	kfree(tagger_data);
+	ds->tagger_data = NULL;
+}
+
+static int hms_connect(struct dsa_switch *ds)
+{
+	struct hms_tagger_data *data;
+
+	data = kzalloc_obj(*data, GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	ds->tagger_data = data;
+
+	return 0;
+}
+
+static void hms_flow_dissect(const struct sk_buff *skb, __be16 *proto,
+			     int *offset)
+{
+	/* No tag added for management frames, all ok */
+	if (unlikely(hms_is_link_local(skb)))
+		return;
+
+	dsa_tag_generic_flow_dissect(skb, proto, offset);
+}
+
+static const struct dsa_device_ops hms_netdev_ops = {
+	.name			= HMS_TAG_NAME,
+	.proto			= DSA_TAG_PROTO_HMS,
+	.xmit			= hms_xmit,
+	.rcv			= hms_rcv,
+	.connect		= hms_connect,
+	.disconnect		= hms_disconnect,
+	.needed_headroom	= VLAN_HLEN,
+	.flow_dissect		= hms_flow_dissect,
+	.promisc_on_conduit	= true,
+};
+
+MODULE_DESCRIPTION("DSA tag driver for Heterogeneous Multi-SoC switches");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_HMS, HMS_TAG_NAME);
+
+module_dsa_tag_driver(hms_netdev_ops);

@@ -19336,6 +19336,15 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/sound/fsl,sgtl5000.yaml
 F:	sound/soc/codecs/sgtl5000*
 
+NXP HMS DSA SWITCH DRIVER
+M:	Minghuan Lian <minghuan.lian@nxp.com>
+L:	netdev@vger.kernel.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/net/dsa/nxp,imxrt1180-netc-switch.yaml
+F:	drivers/net/dsa/hms/
+F:	include/linux/dsa/tag_hms.h
+F:	net/dsa/tag_hms.c
+
 NXP SJA1105 ETHERNET SWITCH DRIVER
 M:	Vladimir Oltean <olteanv@gmail.com>
 L:	linux-kernel@vger.kernel.org

@@ -26,6 +26,8 @@ config NET_DSA_LOOP
 
 source "drivers/net/dsa/hirschmann/Kconfig"
 
+source "drivers/net/dsa/hms/Kconfig"
+
 source "drivers/net/dsa/lantiq/Kconfig"
 
 config NET_DSA_MT7530

@@ -17,6 +17,7 @@ obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o
 obj-$(CONFIG_NET_DSA_YT921X) += yt921x.o
 obj-y				+= b53/
 obj-y				+= hirschmann/
+obj-y				+= hms/
 obj-y				+= lantiq/
 obj-y				+= microchip/
 obj-y				+= mv88e6xxx/

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config NET_DSA_HMS_SWITCH
+	tristate "NXP HMS DSA switch driver"
+	depends on NET_DSA
+	depends on SPI
+	select NET_DSA_TAG_HMS
+	select NET_DSA_TAG_8021Q
+	help
+	  This enables support for the NXP i.MX RT1180 NETC Ethernet
+	  switch managed through the Heterogeneous Multi-SoC (HMS)
+	  interface over SPI.
+
+	  Say Y or M if your system uses an i.MX RT1180 as a companion
+	  switch controller and exposes its switch ports through DSA.

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+obj-$(CONFIG_NET_DSA_HMS_SWITCH) += hms.o
+
+hms-objs := \
+	hms_spi.o \
+	hms_config.o \
+	hms_main.o

@@ -0,0 +1,253 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * NXP HMS (Heterogeneous Multi-SoC) DSA Switch Configuration
+ *
+ * Copyright 2025-2026 NXP
+ */
+
+#include <linux/slab.h>
+#include "hms_switch.h"
+
+int hms_get_devinfo(struct hms_private *priv, struct hms_config *config)
+{
+	struct hms_cmd_sysinfo sysinfo;
+	int rc;
+
+	rc = hms_xfer_get_cmd(priv, HMS_CMD_SYS_INFO_GET, 0,
+			      &sysinfo, sizeof(sysinfo));
+	if (rc)
+		return rc;
+
+	config->device_id = sysinfo.device_id;
+	config->vendor_id = sysinfo.vendor_id;
+	config->version_major = sysinfo.version_major;
+	config->version_minor = sysinfo.version_minor;
+	config->version_revision = sysinfo.version_revision;
+	config->cpu_port = sysinfo.cpu_port;
+
+	return 0;
+}
+
+int hms_port_mtu_set(struct hms_private *priv, int port, int mtu)
+{
+	struct hms_cmd_port_mtu cmd;
+
+	cmd.port = port;
+	cmd.mtu = mtu;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_MTU_SET,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_mtu_get(struct hms_private *priv, int port, int *mtu)
+{
+	struct hms_cmd_port_mtu cmd;
+	int rc;
+
+	rc = hms_xfer_get_cmd(priv, HMS_CMD_PORT_MTU_GET, port,
+			      &cmd, sizeof(cmd));
+	if (rc)
+		return rc;
+
+	*mtu = cmd.mtu;
+
+	return 0;
+}
+
+int hms_port_phylink_mode_set(struct hms_private *priv,
+			      struct hms_mac_config *mac)
+{
+	struct hms_cmd_port_phylink_mode cmd;
+
+	cmd.port = mac->port;
+	cmd.duplex = mac->duplex;
+	cmd.speed = mac->speed;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_PHYLINK_MODE_SET,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_phylink_status_get(struct hms_private *priv,
+				struct hms_mac_config *mac)
+{
+	struct hms_cmd_port_phylink_status status;
+	int rc;
+
+	rc = hms_xfer_get_cmd(priv, HMS_CMD_PORT_PHYLINK_STATUS_GET, mac->port,
+			      &status, sizeof(status));
+	if (rc)
+		return rc;
+
+	mac->link = status.link;
+	mac->speed = status.speed;
+	mac->duplex = status.duplex;
+
+	return 0;
+}
+
+int hms_port_pvid_set(struct hms_private *priv, int port, u16 pvid)
+{
+	struct hms_cmd_port_pvid cmd;
+
+	cmd.port = port;
+	cmd.pvid = pvid;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_PVID_SET,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_link_set(struct hms_private *priv, int port, bool up)
+{
+	struct hms_cmd_port_link cmd;
+
+	cmd.port = port;
+	cmd.link = up;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_LINK_SET,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_dropuntag_set(struct hms_private *priv, int port, bool drop)
+{
+	struct hms_cmd_port_dropuntag cmd;
+
+	cmd.port = port;
+	cmd.drop = drop;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_DROPUNTAG_SET,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_dsa_add(struct hms_private *priv, int cpu_port,
+		     int user_port, const unsigned char *mac_addr)
+{
+	struct hms_cmd_port_dsa_add cmd;
+
+	cmd.cpu_port = cpu_port;
+	cmd.user_port = user_port;
+	memcpy(cmd.mac_addr, mac_addr, ETH_ALEN);
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_DSA_ADD,
+				&cmd, sizeof(cmd));
+}
+
+int hms_port_dsa_del(struct hms_private *priv, int user_port)
+{
+	struct hms_cmd_port_dsa_del cmd;
+
+	cmd.user_port = user_port;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_PORT_DSA_DEL,
+				&cmd, sizeof(cmd));
+}
+
+int hms_vlan_entry_add(struct hms_private *priv,
+		       u16 vid, int port, bool untagged)
+{
+	struct hms_cmd_vlan cmd;
+
+	cmd.vid = vid;
+	cmd.port = port;
+	cmd.untagged = untagged;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_VLAN_ADD,
+				&cmd, sizeof(cmd));
+}
+
+int hms_vlan_entry_del(struct hms_private *priv, u16 vid, int port)
+{
+	struct hms_cmd_vlan cmd;
+
+	cmd.vid = vid;
+	cmd.port = port;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_VLAN_DEL,
+				&cmd, sizeof(cmd));
+}
+
+int hms_vlan_entry_read(struct hms_private *priv,
+			struct hms_vlan_entry *vlan,
+			u32 entry_id, u32 *next_id)
+{
+	struct hms_cmd_vlan_dump resp;
+	int rc;
+
+	rc = hms_xfer_get_cmd(priv, HMS_CMD_VLAN_DUMP, entry_id,
+			      &resp, sizeof(resp));
+	if (rc)
+		return rc;
+
+	vlan->vid = resp.vid;
+	vlan->port_map = resp.port_map;
+	*next_id = resp.resume_entry_id;
+
+	return 0;
+}
+
+int hms_fdb_entry_add(struct hms_private *priv,
+		      const unsigned char *mac_addr,
+		      u16 vid, int port)
+{
+	struct hms_cmd_fdb cmd;
+
+	memcpy(cmd.mac_addr, mac_addr, ETH_ALEN);
+	cmd.vid = vid;
+	cmd.port = port;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_FDB_ADD,
+				&cmd, sizeof(cmd));
+}
+
+int hms_fdb_entry_del(struct hms_private *priv,
+		      const unsigned char *mac_addr,
+		      u16 vid, int port)
+{
+	struct hms_cmd_fdb cmd;
+
+	memcpy(cmd.mac_addr, mac_addr, ETH_ALEN);
+	cmd.vid = vid;
+	cmd.port = port;
+
+	return hms_xfer_set_cmd(priv, HMS_CMD_FDB_DEL,
+				&cmd, sizeof(cmd));
+}
+
+int hms_fdb_entry_get(struct hms_private *priv, struct hms_fdb_entry *fdb,
+		      u32 entry_id, u32 *next_id)
+{
+	struct hms_cmd_fdb_dump resp;
+	int rc;
+
+	rc = hms_xfer_get_cmd(priv, HMS_CMD_FDB_DUMP, entry_id,
+			      &resp, sizeof(resp));
+	if (rc)
+		return rc;
+
+	memcpy(fdb->mac_addr, resp.mac_addr, ETH_ALEN);
+	fdb->vid = resp.vid;
+	fdb->port_map = resp.port_map;
+	fdb->dynamic = resp.dynamic;
+	*next_id = resp.resume_entry_id;
+
+	return 0;
+}
+
+int hms_config_setup(struct hms_config *config)
+{
+	config->vlan_max_count = 256;
+	config->vlan = kcalloc(config->vlan_max_count,
+			       sizeof(struct hms_vlan_entry),
+			       GFP_KERNEL);
+	if (!config->vlan)
+		return -ENOMEM;
+
+	config->vlan_count = 0;
+
+	return 0;
+}
+
+void hms_config_free(struct hms_config *config)
+{
+	kfree(config->vlan);
+	config->vlan = NULL;
+}

@@ -0,0 +1,259 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * NXP HMS (Heterogeneous Multi-SoC) DSA Switch Configuration
+ *
+ * Copyright 2025-2026 NXP
+ */
+
+#ifndef _HMS_CONFIG_H
+#define _HMS_CONFIG_H
+
+#include <linux/types.h>
+#include <linux/if_ether.h>
+
+#define HMS_RT1180_DEVICE_ID		0xe001
+#define HMS_NUM_PORTS			5
+#define HMS_MAX_NUM_PORTS		HMS_NUM_PORTS
+#define HMS_NUM_TC			8
+
+#define HMS_ETHTOOL_STATS_NUM_MAX	120
+
+#define HMS_SPI_WORD_BITS		8
+#define HMS_SPI_MSG_WORD_BYTES		4
+#define HMS_SPI_MSG_HEADER_SIZE		20
+#define HMS_SPI_MSG_PARAM_SIZE		16
+#define HMS_SPI_MSG_MAXLEN		4096
+#define HMS_SPI_MSG_RESPONSE_TIME	1000 /* us */
+
+#define HMS_CMD_DIR_SHIFT		31
+#define HMS_CMD_LEN_SHIFT		16
+
+enum hms_spi_rw_mode {
+	SPI_READ = 0,
+	SPI_WRITE = 1,
+};
+
+struct hms_cmd_hdr {
+	u32 cmd;
+	u8 param[HMS_SPI_MSG_PARAM_SIZE];
+};
+
+/* Command */
+enum hms_cmd {
+	/* Port related commands */
+	HMS_CMD_SYS_INFO_GET = 0x1,
+	HMS_CMD_PORT_DSA_ADD,
+	HMS_CMD_PORT_DSA_DEL,
+	HMS_CMD_PORT_MTU_SET,
+	HMS_CMD_PORT_MTU_GET,
+	HMS_CMD_PORT_PHYLINK_MODE_SET,
+	HMS_CMD_PORT_PHYLINK_STATUS_GET,
+	HMS_CMD_PORT_ETHTOOL_STATS_GET,
+	HMS_CMD_PORT_PVID_SET,
+	HMS_CMD_PORT_LINK_SET,
+	HMS_CMD_PORT_DROPUNTAG_SET,
+
+	/* FDB/VLAN commands */
+	HMS_CMD_FDB_ADD = 0x1000,
+	HMS_CMD_FDB_DEL,
+	HMS_CMD_FDB_DUMP,
+	HMS_CMD_VLAN_ADD,
+	HMS_CMD_VLAN_DEL,
+	HMS_CMD_VLAN_DUMP,
+
+	HMS_CMD_MAX_NUM,
+};
+
+struct hms_cmd_sysinfo {
+	u16 device_id;
+	u16 vendor_id;
+	u8  version_major;
+	u8  version_minor;
+	u8  version_revision;
+	u8  cpu_port;
+};
+
+/* command data for HMS_CMD_PORT_DSA_ADD */
+struct hms_cmd_port_dsa_add {
+	u8 cpu_port;
+	u8 user_port;
+	u8 mac_addr[ETH_ALEN];
+};
+
+/* command data for HMS_CMD_PORT_DSA_DEL */
+struct hms_cmd_port_dsa_del {
+	u8 user_port;
+	u8 reserved[3];
+};
+
+/* command data for HMS_CMD_PORT_MTU_SET */
+struct hms_cmd_port_mtu {
+	u8 port;
+	u8 reserved;
+	u16 mtu;
+};
+
+/* command data for HMS_CMD_PORT_PHYLINK_MODE_SET */
+struct hms_cmd_port_phylink_mode {
+	u8 port;
+	bool duplex;
+	u16 speed;
+};
+
+/* command data for HMS_CMD_PORT_PVID_SET */
+struct hms_cmd_port_pvid {
+	u8 port;
+	u8 reserved;
+	u16 pvid;
+};
+
+/* command data for hms_cmd_port_link */
+struct hms_cmd_port_link {
+	u8 port;
+	bool link;
+	u8 reserved[2];
+};
+
+/* command data for hms_cmd_port_dropuntag */
+struct hms_cmd_port_dropuntag {
+	u8 port;
+	u8 reserved;
+	u16 drop;
+};
+
+/* command data for HMS_CMD_FDB_ADD */
+struct hms_cmd_fdb {
+	u8 mac_addr[ETH_ALEN];
+	u16 vid;
+	u8 port;
+	u8 reserved[3];
+};
+
+/* command data for HMS_CMD_VLAN_ADD */
+struct hms_cmd_vlan {
+	u16 vid;
+	u8 port;
+	bool untagged;
+};
+
+/* data returned for HMS_CMD_PORT_PHYLINK_STATUS_GET */
+struct hms_cmd_port_phylink_status {
+	u8 port;
+	bool link;
+	u16 speed;
+	bool duplex;
+	u8 reserved[3];
+};
+
+/* command param */
+struct hms_cmd_read_param {
+	u32 id;
+};
+
+/* data returned for HMS_CMD_FDB_DUMP */
+struct hms_cmd_fdb_dump {
+	u8 mac_addr[ETH_ALEN];
+	u16 vid;
+	u32 port_map;
+	bool dynamic;
+	u8 reserved[3];
+	u32 resume_entry_id;
+};
+
+/* data returned for HMS_CMD_VLAN_DUMP */
+struct hms_cmd_vlan_dump {
+	u16 vid;
+	bool untagged;
+	u8 reserved;
+	u32 port_map;
+	u32 resume_entry_id;
+};
+
+struct hms_cmd_port_ethtool_stats {
+	u64 values[HMS_ETHTOOL_STATS_NUM_MAX];
+};
+
+struct hms_mac_config {
+	u8 port;
+	u16 speed;
+	u16 vlanid;
+	bool link;
+	bool egress;
+	bool ingress;
+	bool duplex;
+	bool drptag;
+	bool drpuntag;
+	bool retag;
+};
+
+struct hms_fdb_entry {
+	u8 mac_addr[ETH_ALEN];
+	u16 vid;
+	u32 port_map;
+	bool dynamic;
+};
+
+struct hms_vlan_entry {
+	u16 vid;
+	u16 port;
+	u32 port_map;
+	u32 tag_ports;
+	u32 entry_id;
+};
+
+struct hms_config {
+	u16 device_id;
+	u16 vendor_id;
+	u8  version_major;
+	u8  version_minor;
+	u8  version_revision;
+	u8  cpu_port_mode;
+	u16 tpid;
+	u16 tpid2;
+	struct hms_mac_config mac[HMS_MAX_NUM_PORTS];
+	int cpu_port;
+	int vlan_count;
+	int vlan_max_count;
+	struct hms_vlan_entry *vlan;
+};
+
+struct hms_private;
+
+int hms_get_devinfo(struct hms_private *priv, struct hms_config *config);
+
+int hms_port_phylink_mode_set(struct hms_private *priv,
+			      struct hms_mac_config *mac);
+int hms_port_phylink_status_get(struct hms_private *priv,
+				struct hms_mac_config *mac);
+int hms_port_pvid_set(struct hms_private *priv, int port, u16 pvid);
+int hms_port_link_set(struct hms_private *priv, int port, bool up);
+int hms_port_dropuntag_set(struct hms_private *priv, int port, bool drop);
+
+int hms_port_mtu_set(struct hms_private *priv, int port, int mtu);
+int hms_port_mtu_get(struct hms_private *priv, int port, int *mtu);
+
+int hms_port_dsa_add(struct hms_private *priv, int cpu_port,
+		     int user_port, const unsigned char *mac_addr);
+int hms_port_dsa_del(struct hms_private *priv, int user_port);
+
+int hms_fdb_entry_add(struct hms_private *priv,
+		      const unsigned char *mac_addr,
+		      u16 vid, int port);
+int hms_fdb_entry_del(struct hms_private *priv,
+		      const unsigned char *mac_addr,
+		      u16 vid, int port);
+int hms_fdb_entry_get(struct hms_private *priv,
+		      struct hms_fdb_entry *fdb,
+		      u32 entry_id, u32 *next_id);
+
+int hms_vlan_entry_add(struct hms_private *priv,
+		       u16 vid, int port, bool untagged);
+int hms_vlan_entry_del(struct hms_private *priv, u16 vid, int port);
+int hms_vlan_entry_read(struct hms_private *priv,
+			struct hms_vlan_entry *vlan,
+			u32 entry_id, u32 *next_id);
+
+int hms_config_setup(struct hms_config *config);
+void hms_config_free(struct hms_config *config);
+
+#endif /* _HMS_CONFIG_H */