Hi Bharat,

In cn10k_outb_cptlf_iq_disable(), there is a potential issue in the 
instruction queue drain loop.

The code reads CN10K_CPT_LF_Q_GRP_PTR and compares nq_ptr and dq_ptr to
check whether the queue is empty.
However, both values are extracted using CPT_LF_Q_GRP_PTR_DQ_PTR, so the
comparison is ineffective and may allow the loop to exit while entries 
are still pending.

The fix extracts nq_ptr using CPT_LF_Q_GRP_PTR_NQ_PTR, which correctly
compares the enqueue and dequeue pointers.

Diff:

- nq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_DQ_PTR, reg_val);
+ nq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_NQ_PTR, reg_val);


Please confirm whether CPT_LF_Q_GRP_PTR_NQ_PTR is the correct enqueue
pointer for CN10K CPT LF.


Fixes: fe079ab05d49 ("cn10k-ipsec: Init hardware for outbound ipsec 
crypto offload")


Thanks,
Alok

---

--- a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c

@@ -195,7 +195,7 @@ static void cn10k_outb_cptlf_iq_disable(struct 

otx2_nic *pf)
                 else
                         cnt++;
                 reg_val = otx2_read64(pf, CN10K_CPT_LF_Q_GRP_PTR);
-               nq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_DQ_PTR, reg_val);
+               nq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_NQ_PTR, reg_val);
                 dq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_DQ_PTR, reg_val);
         } while ((cnt < 10) && (nq_ptr != dq_ptr));