[PATCH RFC net-next 15/23] net: dsa: lantiq_gswip: allow adjusting MII delays
From: Daniel Golle <daniel@makrotopia.org>
Date: 2025-08-16 19:55:24
Also in:
lkml
Subsystem:
networking drivers, networking [dsa], the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Andrew Lunn, Vladimir Oltean, Linus Torvalds
Currently the MII clk vs. data delay is configured based on the PHY interface mode. In addition to that add support for setting up MII delays using the standard Device Tree properties 'tx-internal-delay-ps' and 'rx-internal-delay-ps' and only fall back to using the PHY interface mode in case both properties are unused. Signed-off-by: Daniel Golle <daniel@makrotopia.org> --- drivers/net/dsa/lantiq_gswip.c | 30 ++++++++++++++++++++++++++++++ drivers/net/dsa/lantiq_gswip.h | 4 ++++ 2 files changed, 34 insertions(+)
diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
index e67950c69978..6eae4fcb99e6 100644
--- a/drivers/net/dsa/lantiq_gswip.c
+++ b/drivers/net/dsa/lantiq_gswip.c@@ -586,6 +586,33 @@ static int gswip_port_vlan_filtering(struct dsa_switch *ds, int port, return 0; } +static bool gswip_mii_delay_setup(struct gswip_priv *priv, struct dsa_port *dp) +{ + u32 tx_delay = GSWIP_MII_PCDU_TXDLY_DEFAULT; + u32 rx_delay = GSWIP_MII_PCDU_RXDLY_DEFAULT; + struct device_node *port_dn = dp->dn; + bool used; + int ret; + + ret = of_property_read_u32(port_dn, "tx-internal-delay-ps", &tx_delay); + if (ret && ret != -EINVAL) + return ret; + used = !ret; + + ret = of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay); + if (ret && ret != -EINVAL) + return ret; + used |= !ret; + + if (used) + gswip_mii_mask_pcdu(priv, GSWIP_MII_PCDU_TXDLY_MASK | + GSWIP_MII_PCDU_RXDLY_MASK, + GSWIP_MII_PCDU_TXDLY(tx_delay) | + GSWIP_MII_PCDU_RXDLY(rx_delay), dp->index); + + return used; +} + static int gswip_setup(struct dsa_switch *ds) { unsigned int cpu_ports = dsa_cpu_ports(ds);
@@ -1521,6 +1548,9 @@ static void gswip_phylink_mac_config(struct phylink_config *config, GSWIP_MII_CFG_RGMII_IBS | GSWIP_MII_CFG_LDCLKDIS, miicfg, port); + if (gswip_mii_delay_setup(priv, dp)) + return; + switch (state->interface) { case PHY_INTERFACE_MODE_RGMII_ID: gswip_mii_mask_pcdu(priv, GSWIP_MII_PCDU_TXDLY_MASK |
diff --git a/drivers/net/dsa/lantiq_gswip.h b/drivers/net/dsa/lantiq_gswip.h
index 5bc47c329620..1b97842b77e7 100644
--- a/drivers/net/dsa/lantiq_gswip.h
+++ b/drivers/net/dsa/lantiq_gswip.h@@ -82,6 +82,10 @@ #define GSWIP_MII_PCDU5 0x05 #define GSWIP_MII_PCDU_TXDLY_MASK GENMASK(2, 0) #define GSWIP_MII_PCDU_RXDLY_MASK GENMASK(9, 7) +#define GSWIP_MII_PCDU_TXDLY(x) u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_TXDLY_MASK) +#define GSWIP_MII_PCDU_RXDLY(x) u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_RXDLY_MASK) +#define GSWIP_MII_PCDU_RXDLY_DEFAULT 2000 /* picoseconds */ +#define GSWIP_MII_PCDU_TXDLY_DEFAULT 2000 /* picoseconds */ /* GSWIP Core Registers */ #define GSWIP_SWRES 0x000
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2.50.1