# Re: \[PATCH net-next v1 2/9\] dt-bindings: Add Tegra234 MGBE clocks and resets

- From: Krzysztof Kozlowski \<hidden\>
- Date: 2022-06-24 16:03:06 
- List: netdev
- Page: https://ratatoskr.run/netdev/2022/06/8206418
- Thread: https://ratatoskr.run/netdev/2022/06/8206300/t.md

```text
On 23/06/2022 09:46, Bhadram Varka wrote:
> From: Thierry Reding <redacted>
> 
> Add the clocks and resets used by the MGBE Ethernet hardware found on
> Tegra234 SoCs.
> 
> Signed-off-by: Thierry Reding <redacted>
> Signed-off-by: Bhadram Varka <redacted>
> ---
>  include/dt-bindings/clock/tegra234-clock.h | 101 +++++++++++++++++++++
>  include/dt-bindings/reset/tegra234-reset.h |   8 ++
>  2 files changed, 109 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h
> index bd4c3086a2da..bab85d9ba8cd 100644
> --- a/include/dt-bindings/clock/tegra234-clock.h
> +++ b/include/dt-bindings/clock/tegra234-clock.h
> @@ -164,10 +164,111 @@
>  #define TEGRA234_CLK_PEX1_C5_CORE		225U
>  /** @brief PLL controlled by CLK_RST_CONTROLLER_PLLC4_BASE */
>  #define TEGRA234_CLK_PLLC4			237U
> +/** @brief RX clock recovered from MGBE0 lane input */

The IDs should be abstract integer incremented by one, without any
holes. I guess the issue was here before, so it's fine but I'll start
complaining at some point :)

Acked-by: Krzysztof Kozlowski <redacted>

Best regards,
Krzysztof
```