From: Hayes Wang <hidden> Date: 2021-08-06 09:17:53
These patches are uesed to avoid the delay of link-up interrupt, when
enabling ASPM for RTL8106e. The patch #1 is used to enable ASPM if
it is possible. And the patch #2 is used to modify the entrance latencies
of L0 and L1.
Hayes Wang (2):
Revert "r8169: avoid link-up interrupt issue on RTL8106e if user
enables ASPM"
r8169: change the L0/L1 entrance latencies for RTL8106e
drivers/net/ethernet/realtek/r8169_main.c | 4 ++++
1 file changed, 4 insertions(+)
--
2.31.1
From: Hayes Wang <hidden> Date: 2021-08-06 09:17:15
The original L0 and L1 entrance latencies of RTL8106e are 4us. And
they cause the delay of link-up interrupt when enabling ASPM. Change
the L0 entrance latency to 7us and L1 entrance latency to 32us. Then,
they could avoid the issue.
Tested-by: Koba Ko <redacted>
Signed-off-by: Hayes Wang <redacted>
---
drivers/net/ethernet/realtek/r8169_main.c | 3 +++
1 file changed, 3 insertions(+)
@@ -3502,6 +3502,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)RTL_W8(tp,MCU,RTL_R8(tp,MCU)|EN_NDP|EN_OOB_RESET);RTL_W8(tp,DLLPR,RTL_R8(tp,DLLPR)&~PFM_EN);+/* The default value is 0x13. Change it to 0x2f */+rtl_csi_access_enable(tp,0x2f);+rtl_eri_write(tp,0x1d0,ERIAR_MASK_0011,0x0000);/* disable EEE */
From: Hayes Wang <hidden> Date: 2021-08-06 09:18:29
This reverts commit 1ee8856de82faec9bc8bd0f2308a7f27e30ba207.
This is used to re-enable ASPM on RTL8106e, if it is possible.
Signed-off-by: Hayes Wang <redacted>
---
drivers/net/ethernet/realtek/r8169_main.c | 1 +
1 file changed, 1 insertion(+)
The original L0 and L1 entrance latencies of RTL8106e are 4us. And
they cause the delay of link-up interrupt when enabling ASPM. Change
the L0 entrance latency to 7us and L1 entrance latency to 32us. Then,
they could avoid the issue.
Tested-by: Koba Ko <redacted>
Signed-off-by: Hayes Wang <redacted>
---
drivers/net/ethernet/realtek/r8169_main.c | 3 +++
1 file changed, 3 insertions(+)
@@ -3502,6 +3502,9 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)RTL_W8(tp,MCU,RTL_R8(tp,MCU)|EN_NDP|EN_OOB_RESET);RTL_W8(tp,DLLPR,RTL_R8(tp,DLLPR)&~PFM_EN);+/* The default value is 0x13. Change it to 0x2f */+rtl_csi_access_enable(tp,0x2f);
Most chip versions use rtl_set_def_aspm_entry_latency() that sets
the value to 0x27. Does this value also work for RTL8106e?
Then we could simply use the same call here.
Can you explain how the L0 and L1 times in us map to the
register value? Then we could add a function that doesn't work
with a magic value but takes the L0 and L1 times in us as
parameter.
From: Hayes Wang <hidden> Date: 2021-08-07 03:50:59
Heiner Kallweit [off-list ref]
Sent: Saturday, August 7, 2021 5:28 AM
[...]
Most chip versions use rtl_set_def_aspm_entry_latency() that sets
the value to 0x27. Does this value also work for RTL8106e?
No, it doesn't work.
Can you explain how the L0 and L1 times in us map to the
register value? Then we could add a function that doesn't work
with a magic value but takes the L0 and L1 times in us as
parameter.
L0 (bit 0~2):
0: 1us
1: 2us
2: 3us
3: 4us
4: 5us
5: 6us
6: 7us
7: 7us (The maximum is 7us)
L1 (bit 3~5):
0: 1us
1: 2us
2: 4us
3: 8us
4: 16us
5: 32us
6: 64us
7: 64us (The maximum is 64us)
Best Regards,
Hayes
Hello:
This series was applied to netdev/net.git (refs/heads/master):
On Fri, 6 Aug 2021 17:15:54 +0800 you wrote:
These patches are uesed to avoid the delay of link-up interrupt, when
enabling ASPM for RTL8106e. The patch #1 is used to enable ASPM if
it is possible. And the patch #2 is used to modify the entrance latencies
of L0 and L1.
Hayes Wang (2):
Revert "r8169: avoid link-up interrupt issue on RTL8106e if user
enables ASPM"
r8169: change the L0/L1 entrance latencies for RTL8106e
[...]