From: Aya Levin <redacted>
When closing the PTP channel, set its pointer explicitly to NULL. PTP
channel is opened on demand, the code verify the pointer validity before
access. Nullify it when closing the PTP channel to avoid unexpected
behavior.
Fixes: 145e5637d941 ("net/mlx5e: Add TX PTP port object support")
Signed-off-by: Aya Levin <redacted>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
From: Maxim Mikityanskiy <redacted>
Port timestamping for PTP can be enabled/disabled while the channels are
closed. In that case mlx5e_safe_switch_channels is skipped, and the
preactivate hook is called directly. However, if that hook returns an
error, the channel parameters must be reverted back to their old values.
This commit adds missing handling on this case.
Fixes: 145e5637d941 ("net/mlx5e: Add TX PTP port object support")
Signed-off-by: Maxim Mikityanskiy <redacted>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c | 5 +++++
1 file changed, 5 insertions(+)
From: Tariq Toukan <tariqt@nvidia.com>
Since cited patch, MLX5E_REQUIRED_WQE_MTTS is not a power of two.
Hence, usage of MLX5E_LOG_ALIGNED_MPWQE_PPW should be replaced,
as it lost some accuracy. Use the designated macro to calculate
the number of required MTTs.
This makes sure the solution in cited patch works properly.
While here, un-inline mlx5e_get_mpwqe_offset(), and remove the
unused RQ parameter.
Fixes: c3c9402373fe ("net/mlx5e: Add resiliency in Striding RQ mode for packets larger than MTU")
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en.h | 7 ++++---
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 6 +++---
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 4 ++--
3 files changed, 9 insertions(+), 8 deletions(-)
From: Maxim Mikityanskiy <redacted>
Each RQ (including XSK RQs) takes a reference to the XDP program. When
an XDP program is attached or detached, the channels and queues are
recreated, however, there is a special flow for changing an active XDP
program to another one. In that flow, channels and queues stay alive,
but the refcounts of the old and new XDP programs are adjusted. This
flow didn't increment refcount by the number of active XSK RQs, and this
commit fixes it.
Fixes: db05815b36cb ("net/mlx5e: Add XSK zero-copy support")
Signed-off-by: Maxim Mikityanskiy <redacted>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
From: Roi Dayan <redacted>
flow_attr->ip_version has the matching that should be done inner/outer.
When working with chains, decapsulation is done on chain0 and next chain
match on outer header which is the original inner which could be ipv4.
So in tunnel route resolution we cannot use that to know which ip version
we are at so save tun_ip_version when parsing the tunnel match and use
that.
Fixes: a508728a4c8b ("net/mlx5e: VF tunnel RX traffic offloading")
Signed-off-by: Roi Dayan <redacted>
Reviewed-by: Dmytro Linkin <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c | 8 ++++----
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c | 3 ++-
drivers/net/ethernet/mellanox/mlx5/core/en_tc.h | 1 +
3 files changed, 7 insertions(+), 5 deletions(-)
@@ -685,14 +685,14 @@ int mlx5e_tc_tun_route_lookup(struct mlx5e_priv *priv,u16vport_num;interr=0;-if(flow_attr->ip_version==4){+if(flow_attr->tun_ip_version==4){/* Addresses are swapped for decap */attr.fl.fl4.saddr=esw_attr->rx_tun_attr->dst_ip.v4;attr.fl.fl4.daddr=esw_attr->rx_tun_attr->src_ip.v4;err=mlx5e_route_lookup_ipv4_get(priv,priv->netdev,&attr);}#if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6)-elseif(flow_attr->ip_version==6){+elseif(flow_attr->tun_ip_version==6){/* Addresses are swapped for decap */attr.fl.fl6.saddr=esw_attr->rx_tun_attr->dst_ip.v6;attr.fl.fl6.daddr=esw_attr->rx_tun_attr->src_ip.v6;
From: Maor Gottlieb <redacted>
QPs which don't care from timestamp mode, should set the ts_format
to default, otherwise the QP creation could be failed if the timestamp
mode is not supported.
Fixes: 2fe8d4b87802 ("RDMA/mlx5: Fail QP creation if the device can not support the CQE TS")
Signed-off-by: Maor Gottlieb <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c | 1 +
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 1 +
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c | 1 +
include/linux/mlx5/qp.h | 7 +++++++
4 files changed, 10 insertions(+)
From: Maor Dickman <redacted>
The cited change added offload support for Geneve options without verifying
the validity of the options masks, this caused offload of rules with match
on Geneve options with class,type and data masks which are zero to fail.
Fix by ignoring the match on Geneve options in case option masks are
all zero.
Fixes: 9272e3df3023 ("net/mlx5e: Geneve, Add support for encap/decap flows offload")
Signed-off-by: Maor Dickman <redacted>
Reviewed-by: Roi Dayan <redacted>
Reviewed-by: Oz Shlomo <redacted>
Reviewed-by: Yevgeny Kliteynik <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c | 4 ++++
1 file changed, 4 insertions(+)
From: Aya Levin <redacted>
Fix a bug of uninitialized pin index when trying to turn off PPS out.
Fixes: de19cd6cc977 ("net/mlx5: Move some PPS logic into helper functions")
Signed-off-by: Aya Levin <redacted>
Reviewed-by: Eran Ben Elisha <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
@@ -5673,13 +5682,14 @@ int mlx5e_netdev_change_profile(struct mlx5e_priv *priv,{unsignedintnew_max_nch=mlx5e_calc_max_nch(priv,new_profile);conststructmlx5e_profile*orig_profile=priv->profile;+structnet_device*netdev=priv->netdev;+structmlx5_core_dev*mdev=priv->mdev;void*orig_ppriv=priv->ppriv;interr,rollback_err;/* sanity */if(new_max_nch!=priv->max_nch){-netdev_warn(priv->netdev,-"%s: Replacing profile with different max channels\n",+netdev_warn(netdev,"%s: Replacing profile with different max channels\n",__func__);return-EINVAL;}
@@ -5689,22 +5699,19 @@ int mlx5e_netdev_change_profile(struct mlx5e_priv *priv,priv->profile->cleanup(priv);mlx5e_priv_cleanup(priv);-err=mlx5e_netdev_attach_profile(priv,new_profile,new_ppriv);+err=mlx5e_netdev_attach_profile(netdev,mdev,new_profile,new_ppriv);if(err){/* roll back to original profile */-netdev_warn(priv->netdev,"%s: new profile init failed, %d\n",-__func__,err);+netdev_warn(netdev,"%s: new profile init failed, %d\n",__func__,err);gotorollback;}return0;rollback:-rollback_err=mlx5e_netdev_attach_profile(priv,orig_profile,orig_ppriv);-if(rollback_err){-netdev_err(priv->netdev,-"%s: failed to rollback to orig profile, %d\n",+rollback_err=mlx5e_netdev_attach_profile(netdev,mdev,orig_profile,orig_ppriv);+if(rollback_err)+netdev_err(netdev,"%s: failed to rollback to orig profile, %d\n",__func__,rollback_err);-}returnerr;}
From: Maor Dickman <redacted>
VF tunnel TX traffic offload is adding flow which forward to flow
tables with lower level, which isn't support on all FW versions
and may cause firmware to fail with syndrome.
Fixed by enabling VF tunnel TX offload only if flow table capability
ignore_flow_level is enabled.
Fixes: 10742efc20a4 ("net/mlx5e: VF tunnel TX traffic offloading")
Signed-off-by: Maor Dickman <redacted>
Reviewed-by: Vlad Buslov <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
From: Shay Drory <redacted>
Cited patch in the fixes tag missed to free the allocated work.
Fix it by freeing the work after work execution.
Fixes: f3196bb0f14c ("net/mlx5: Introduce vhca state event notifier")
Signed-off-by: Shay Drory <redacted>
Reviewed-by: Parav Pandit <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c | 1 +
1 file changed, 1 insertion(+)
From: Maor Gottlieb <redacted>
1. Don't set the ts_format bit to default when it reserved - device is
running in the old mode (free running).
2. XRC doesn't have a CQ therefore the ts format in the QP
context should be default / free running.
3. Set ts_format to WQ.
Fixes: 2fe8d4b87802 ("RDMA/mlx5: Fail QP creation if the device can not support the CQE TS")
Signed-off-by: Maor Gottlieb <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/infiniband/hw/mlx5/qp.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
@@ -1078,7 +1078,7 @@ static int _create_kernel_qp(struct mlx5_ib_dev *dev,qpc=MLX5_ADDR_OF(create_qp_in,*in,qpc);MLX5_SET(qpc,qpc,uar_page,uar_index);-MLX5_SET(qpc,qpc,ts_format,MLX5_QPC_TIMESTAMP_FORMAT_DEFAULT);+MLX5_SET(qpc,qpc,ts_format,mlx5_get_qp_default_ts(dev->mdev));MLX5_SET(qpc,qpc,log_page_size,qp->buf.page_shift-MLX5_ADAPTER_PAGE_SHIFT);/* Set "fast registration enabled" for all kernel QPs */
From: Shay Drory <redacted>
When SF id is unavailable, code jumps to wrong label that accesses
sw id array outside of its range.
Hence, when SF id is not allocated, avoid accessing such array.
Fixes: 8f0105418668 ("net/mlx5: SF, Add port add delete functionality")
Signed-off-by: Shay Drory <redacted>
Reviewed-by: Parav Pandit <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Jason Gunthorpe <jgg@ziepe.ca> Date: 2021-03-10 19:26:23
On Wed, Mar 10, 2021 at 11:03:37AM -0800, Saeed Mahameed wrote:
From: Maor Gottlieb <redacted>
1. Don't set the ts_format bit to default when it reserved - device is
running in the old mode (free running).
2. XRC doesn't have a CQ therefore the ts format in the QP
context should be default / free running.
3. Set ts_format to WQ.
Fixes: 2fe8d4b87802 ("RDMA/mlx5: Fail QP creation if the device can not support the CQE TS")
Signed-off-by: Maor Gottlieb <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/infiniband/hw/mlx5/qp.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
From: Leon Romanovsky <leon@kernel.org> Date: 2021-03-11 08:58:53
On Wed, Mar 10, 2021 at 11:03:37AM -0800, Saeed Mahameed wrote:
From: Maor Gottlieb <redacted>
1. Don't set the ts_format bit to default when it reserved - device is
running in the old mode (free running).
2. XRC doesn't have a CQ therefore the ts format in the QP
context should be default / free running.
3. Set ts_format to WQ.
Fixes: 2fe8d4b87802 ("RDMA/mlx5: Fail QP creation if the device can not support the CQE TS")
Signed-off-by: Maor Gottlieb <redacted>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/infiniband/hw/mlx5/qp.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
I reviewed it too.
Thanks,
Acked-by: Leon Romanovsky <leonro@nvidia.com>