[PATCH net 0/3] Fix TRSCER masks in the Ether driver

Here are 3 patches against DaveM's 'net' repo. I'm fixing the TRSCER masks in
the driver to match the manuals...

[1/3] sh_eth: fix TRSCER mask for SH771x
[2/3] sh_eth: fix TRSCER mask for R7S72100
[3/3] sh_eth: fix TRSCER mask for R7S9210

According  to  the SH7710, SH7712, SH7713 Group User's Manual: Hardware,
Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named
differently), with all the other bits reserved. Apparently, this was not
the case with some early revisions of the manual as we have the other
bits declared (and set) in the original driver.  Follow the suit and add
the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x...

Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
Signed-off-by: Sergey Shtylyov <redacted>

---
 drivers/net/ethernet/renesas/sh_eth.c |    3 +++
 1 file changed, 3 insertions(+)

Index: net/drivers/net/ethernet/renesas/sh_eth.c
===================================================================

--- net.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net/drivers/net/ethernet/renesas/sh_eth.c

@@ -1089,6 +1089,9 @@ static struct sh_eth_cpu_data sh771x_dat
 			  EESIPR_CEEFIP | EESIPR_CELFIP |
 			  EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
 			  EESIPR_PREIP | EESIPR_CERFIP,
+
+	.trscer_err_mask = DESC_I_RINT8,
+
 	.tsu		= 1,
 	.dual_port	= 1,
 };

According  to  the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask.  Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.

Fixes: db893473d313 ("sh_eth: Add support for r7s72100")
Signed-off-by: Sergey Shtylyov <redacted>

---
 drivers/net/ethernet/renesas/sh_eth.c |    2 ++
 1 file changed, 2 insertions(+)

Index: net/drivers/net/ethernet/renesas/sh_eth.c
===================================================================

--- net.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net/drivers/net/ethernet/renesas/sh_eth.c

@@ -560,6 +560,8 @@ static struct sh_eth_cpu_data r7s72100_d
 			  EESR_TDE,
 	.fdr_value	= 0x0000070f,
 
+	.trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
+
 	.no_psr		= 1,
 	.apr		= 1,
 	.mpr		= 1,

According  to the RZ/A2M Group User's Manual: Hardware, Rev. 2.00,
the TRSCER register has bit 9 reserved, hence we can't use the driver's
default TRSCER mask.  Add the explicit initializer for sh_eth_cpu_data::
trscer_err_mask for R7S9210.

Fixes: 6e0bb04d0e4f ("sh_eth: Add R7S9210 support")
Signed-off-by: Sergey Shtylyov <redacted>

---
 drivers/net/ethernet/renesas/sh_eth.c |    2 ++
 1 file changed, 2 insertions(+)

Index: net/drivers/net/ethernet/renesas/sh_eth.c
===================================================================

--- net.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net/drivers/net/ethernet/renesas/sh_eth.c

@@ -782,6 +782,8 @@ static struct sh_eth_cpu_data r7s9210_da
 
 	.fdr_value	= 0x0000070f,
 
+	.trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
+
 	.apr		= 1,
 	.mpr		= 1,
 	.tpauser	= 1,

Hello:

This series was applied to netdev/net.git (refs/heads/master):

On Sun, 28 Feb 2021 23:24:16 +0300 you wrote:

Here are 3 patches against DaveM's 'net' repo. I'm fixing the TRSCER masks in
the driver to match the manuals...

[1/3] sh_eth: fix TRSCER mask for SH771x
[2/3] sh_eth: fix TRSCER mask for R7S72100
[3/3] sh_eth: fix TRSCER mask for R7S9210

Here is the summary with links:
  - [net,1/3] sh_eth: fix TRSCER mask for SH771x
    https://git.kernel.org/netdev/net/c/8c91bc3d44df
  - [net,2/3] sh_eth: fix TRSCER mask for R7S72100
    https://git.kernel.org/netdev/net/c/75be7fb7f978
  - [net,3/3] sh_eth: fix TRSCER mask for R7S9210
    https://git.kernel.org/netdev/net/c/165bc5a4f30e

You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

On Mon, Mar 1, 2021 at 10:38 PM [off-list ref] wrote:

This series was applied to netdev/net.git (refs/heads/master):

On Sun, 28 Feb 2021 23:24:16 +0300 you wrote:

quoted

Here are 3 patches against DaveM's 'net' repo. I'm fixing the TRSCER masks in
the driver to match the manuals...

[1/3] sh_eth: fix TRSCER mask for SH771x
[2/3] sh_eth: fix TRSCER mask for R7S72100
[3/3] sh_eth: fix TRSCER mask for R7S9210

Here is the summary with links:
  - [net,1/3] sh_eth: fix TRSCER mask for SH771x
    https://git.kernel.org/netdev/net/c/8c91bc3d44df
  - [net,2/3] sh_eth: fix TRSCER mask for R7S72100
    https://git.kernel.org/netdev/net/c/75be7fb7f978
  - [net,3/3] sh_eth: fix TRSCER mask for R7S9210
    https://git.kernel.org/netdev/net/c/165bc5a4f30e

That was quick.  And as they're queued in net, not net-next, they
missed today's renesas-drivers release, and all related testing...

I applied them manually, and boot-tested rskrza1 (R7S72100) and
rza2mevb (R7S9210) using nfsroot. Worked fine.

Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>

Review will take a bit longer...

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

On Sun, Feb 28, 2021 at 9:54 PM Sergey Shtylyov [off-list ref] wrote:

According  to  the SH7710, SH7712, SH7713 Group User's Manual: Hardware,
Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named
differently), with all the other bits reserved. Apparently, this was not
the case with some early revisions of the manual as we have the other
bits declared (and set) in the original driver.  Follow the suit and add
the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x...

Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
Signed-off-by: Sergey Shtylyov <redacted>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

On Sun, Feb 28, 2021 at 9:54 PM Sergey Shtylyov [off-list ref] wrote:

According  to  the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask.  Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.

Fixes: db893473d313 ("sh_eth: Add support for r7s72100")
Signed-off-by: Sergey Shtylyov <redacted>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

On Sun, Feb 28, 2021 at 9:56 PM Sergey Shtylyov [off-list ref] wrote:

According  to the RZ/A2M Group User's Manual: Hardware, Rev. 2.00,
the TRSCER register has bit 9 reserved, hence we can't use the driver's
default TRSCER mask.  Add the explicit initializer for sh_eth_cpu_data::
trscer_err_mask for R7S9210.

Fixes: 6e0bb04d0e4f ("sh_eth: Add R7S9210 support")
Signed-off-by: Sergey Shtylyov <redacted>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds