How to disable CRC32 FCS in stmmac (v3.5)?

I have a FPGA sending frames (payload length=1280) over RGMII to a Samsung module which includes STMMAC MAC IP (v3.5).

If the FCS is correct, I manage to receive data from the FPGA to the MAC in the kernel.

For multiple reasons, I wish to disable FCS so that frames are received in the kernel even if the 4-byte CRC FCS are wrong.

After a lot tries for the past few weeks, I don't manage to receive error frames. Especially, if FCS is wrong, I don't get anything in "stmmac_rx(struct stmmac_priv *priv, int limit)".

Here is a list of all the relevant bits I have played with:

C006_0000h (CST 25): CRC Stripping for Type Frames
C006_0000h (IPC 10): Checksum Offload
C006_0000h (ACS 7): Automatic Pad or CRC Stripping
C006_1018h (DT 26): Disable dropping of TCP/IP Checksum Error Frames
C006_1018h (FEF 7): Forward Error Frames

Whithout any special hacking, my default registers are:
C006_0000h: 0x1100880 (25:0, 10:0, 7:1)
C006_1018h: 0x2202006 (26:0, 7:0)

I have also unsuccessfully played with "ethtool --offload eth0 rx off"

The MAC registers documentation is rather sparse and written in flaky English though it seems that the register description table is a copy paste from the original ST documentation.


Has anyone managed to achieve my objective, getting rid of FCS frame drop?

Grégoire