[PATCH net-next v1] net: phy: tja11xx: add cable-test support

Add initial cable testing support.
This PHY needs only 100usec for this test and it is recommended to run it
before the link is up. For now, provide at least ethtool support, so it
can be tested by more developers.

This patch was tested with TJA1102 PHY with following results:
- No cable, is detected as open
- 1m cable, with no connected other end and detected as open
- a 40m cable (out of spec, max lenght should be 15m) is detected as OK.

Current patch do not provide polarity test support. This test would
indicate not proper wire connection, where "+" wire of main phy is
connected to the "-" wire of the link partner.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/net/phy/nxp-tja11xx.c | 106 +++++++++++++++++++++++++++++++++-
 1 file changed, 105 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c
index ca5f9d4dc57ed..8b743d25002b9 100644
--- a/drivers/net/phy/nxp-tja11xx.c
+++ b/drivers/net/phy/nxp-tja11xx.c

@@ -5,6 +5,7 @@
  */
 #include <linux/delay.h>
 #include <linux/ethtool.h>
+#include <linux/ethtool_netlink.h>
 #include <linux/kernel.h>
 #include <linux/mdio.h>
 #include <linux/mii.h>

@@ -26,6 +27,7 @@
 #define MII_ECTRL_POWER_MODE_NO_CHANGE	(0x0 << 11)
 #define MII_ECTRL_POWER_MODE_NORMAL	(0x3 << 11)
 #define MII_ECTRL_POWER_MODE_STANDBY	(0xc << 11)
+#define MII_ECTRL_CABLE_TEST		BIT(5)
 #define MII_ECTRL_CONFIG_EN		BIT(2)
 #define MII_ECTRL_WAKE_REQUEST		BIT(0)
 

@@ -55,6 +57,11 @@
 #define MII_GENSTAT			24
 #define MII_GENSTAT_PLL_LOCKED		BIT(14)
 
+#define MII_EXTSTAT			25
+#define MII_EXTSTAT_SHORT_DETECT	BIT(8)
+#define MII_EXTSTAT_OPEN_DETECT		BIT(7)
+#define MII_EXTSTAT_POLARITY_DETECT	BIT(6)
+
 #define MII_COMMCFG			27
 #define MII_COMMCFG_AUTO_OP		BIT(15)
 

@@ -111,6 +118,11 @@ static int tja11xx_enable_link_control(struct phy_device *phydev)
 	return phy_set_bits(phydev, MII_ECTRL, MII_ECTRL_LINK_CONTROL);
 }
 
+static int tja11xx_disable_link_control(struct phy_device *phydev)
+{
+	return phy_clear_bits(phydev, MII_ECTRL, MII_ECTRL_LINK_CONTROL);
+}
+
 static int tja11xx_wakeup(struct phy_device *phydev)
 {
 	int ret;

@@ -536,6 +548,93 @@ static int tja11xx_config_intr(struct phy_device *phydev)
 	return phy_write(phydev, MII_INTEN, value);
 }
 
+static int tja11xx_cable_test_start(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = phy_clear_bits(phydev, MII_COMMCFG, MII_COMMCFG_AUTO_OP);
+	if (ret)
+		return ret;
+
+	ret = tja11xx_wakeup(phydev);
+	if (ret < 0)
+		return ret;
+
+	ret = tja11xx_disable_link_control(phydev);
+	if (ret < 0)
+		return ret;
+
+	return phy_set_bits(phydev, MII_ECTRL, MII_ECTRL_CABLE_TEST);
+}
+
+/*
+ * | BI_DA+           | BI_DA-                 | Result
+ * | open             | open                   | open
+ * | + short to -     | - short to +           | short
+ * | short to Vdd     | open                   | open
+ * | open             | shot to Vdd            | open
+ * | short to Vdd     | short to Vdd           | short
+ * | shot to GND      | open                   | open
+ * | open             | shot to GND            | open
+ * | short to GND     | shot to GND            | short
+ * | connected to active link partner (master) | shot and open
+ */
+static int tja11xx_cable_test_report_trans(u32 result)
+{
+	u32 mask = MII_EXTSTAT_SHORT_DETECT | MII_EXTSTAT_OPEN_DETECT;
+
+	if ((result & mask) == mask) {
+		/* connected to active link partner (master) */
+		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
+	} else if ((result & mask) == 0) {
+		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
+	} else if (result & MII_EXTSTAT_SHORT_DETECT) {
+		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
+	} else if (result & MII_EXTSTAT_OPEN_DETECT) {
+		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
+	} else {
+		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
+	}
+}
+
+static int tja11xx_cable_test_report(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = phy_read(phydev, MII_EXTSTAT);
+	if (ret < 0)
+		return ret;
+
+	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
+				tja11xx_cable_test_report_trans(ret));
+
+	return 0;
+}
+
+static int tja11xx_cable_test_get_status(struct phy_device *phydev,
+					 bool *finished)
+{
+	int ret;
+
+	*finished = false;
+
+	ret = phy_read(phydev, MII_ECTRL);
+	if (ret < 0)
+		return ret;
+
+	if (!(ret & MII_ECTRL_CABLE_TEST)) {
+		*finished = true;
+
+		ret = phy_set_bits(phydev, MII_COMMCFG, MII_COMMCFG_AUTO_OP);
+		if (ret)
+			return ret;
+
+		return tja11xx_cable_test_report(phydev);
+	}
+
+	return 0;
+}
+
 static struct phy_driver tja11xx_driver[] = {
 	{
 		PHY_ID_MATCH_MODEL(PHY_ID_TJA1100),

@@ -572,6 +671,7 @@ static struct phy_driver tja11xx_driver[] = {
 	}, {
 		.name		= "NXP TJA1102 Port 0",
 		.features       = PHY_BASIC_T1_FEATURES,
+		.flags          = PHY_POLL_CABLE_TEST,
 		.probe		= tja1102_p0_probe,
 		.soft_reset	= tja11xx_soft_reset,
 		.config_aneg	= tja11xx_config_aneg,

@@ -587,10 +687,12 @@ static struct phy_driver tja11xx_driver[] = {
 		.get_stats	= tja11xx_get_stats,
 		.ack_interrupt	= tja11xx_ack_interrupt,
 		.config_intr	= tja11xx_config_intr,
-
+		.cable_test_start = tja11xx_cable_test_start,
+		.cable_test_get_status = tja11xx_cable_test_get_status,
 	}, {
 		.name		= "NXP TJA1102 Port 1",
 		.features       = PHY_BASIC_T1_FEATURES,
+		.flags          = PHY_POLL_CABLE_TEST,
 		/* currently no probe for Port 1 is need */
 		.soft_reset	= tja11xx_soft_reset,
 		.config_aneg	= tja11xx_config_aneg,

@@ -606,6 +708,8 @@ static struct phy_driver tja11xx_driver[] = {
 		.get_stats	= tja11xx_get_stats,
 		.ack_interrupt	= tja11xx_ack_interrupt,
 		.config_intr	= tja11xx_config_intr,
+		.cable_test_start = tja11xx_cable_test_start,
+		.cable_test_get_status = tja11xx_cable_test_get_status,
 	}
 };
 

-- 
2.26.2

On Wed, May 13, 2020 at 02:34:40PM +0200, Oleksij Rempel wrote:

Do these registers all conform to the standard? Can we pull this code
out into a library which all standards conformant PHY drivers can use?

The code itself looks O.K.

    Andrew

On Wed, May 13, 2020 at 03:39:25PM +0200, Andrew Lunn wrote:

On Wed, May 13, 2020 at 02:34:40PM +0200, Oleksij Rempel wrote:

quoted

Add initial cable testing support.
This PHY needs only 100usec for this test and it is recommended to run it
before the link is up. For now, provide at least ethtool support, so it
can be tested by more developers.

This patch was tested with TJA1102 PHY with following results:
- No cable, is detected as open
- 1m cable, with no connected other end and detected as open
- a 40m cable (out of spec, max lenght should be 15m) is detected as OK.

Current patch do not provide polarity test support. This test would
indicate not proper wire connection, where "+" wire of main phy is
connected to the "-" wire of the link partner.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 drivers/net/phy/nxp-tja11xx.c | 106 +++++++++++++++++++++++++++++++++-
 1 file changed, 105 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c
index ca5f9d4dc57ed..8b743d25002b9 100644
--- a/drivers/net/phy/nxp-tja11xx.c
+++ b/drivers/net/phy/nxp-tja11xx.c

@@ -5,6 +5,7 @@
  */
 #include <linux/delay.h>
 #include <linux/ethtool.h>
+#include <linux/ethtool_netlink.h>
 #include <linux/kernel.h>
 #include <linux/mdio.h>
 #include <linux/mii.h>

@@ -26,6 +27,7 @@
 #define MII_ECTRL_POWER_MODE_NO_CHANGE	(0x0 << 11)
 #define MII_ECTRL_POWER_MODE_NORMAL	(0x3 << 11)
 #define MII_ECTRL_POWER_MODE_STANDBY	(0xc << 11)
+#define MII_ECTRL_CABLE_TEST		BIT(5)
 #define MII_ECTRL_CONFIG_EN		BIT(2)
 #define MII_ECTRL_WAKE_REQUEST		BIT(0)
 

@@ -55,6 +57,11 @@
 #define MII_GENSTAT			24
 #define MII_GENSTAT_PLL_LOCKED		BIT(14)
 
+#define MII_EXTSTAT			25
+#define MII_EXTSTAT_SHORT_DETECT	BIT(8)
+#define MII_EXTSTAT_OPEN_DETECT		BIT(7)
+#define MII_EXTSTAT_POLARITY_DETECT	BIT(6)
+

Do these registers all conform to the standard? Can we pull this code
out into a library which all standards conformant PHY drivers can use?

According to opensig, this functionality should be present on all new T1 PHYs.
But the register/bit layout is no specified as standard. At least I was not able
to find it. I assume, current layout is TJA11xx specific.

The code itself looks O.K.

What would be the best place to do a test before the link is getting up?
Can it be done in the phy core, or it should be done in the PHY driver?

So far, no action except of logging these errors is needed. 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

What would be the best place to do a test before the link is getting up?
Can it be done in the phy core, or it should be done in the PHY driver?

So far, no action except of logging these errors is needed. 

You could do it in the config_aneg callback.

A kernel log entry is not very easy to use. You might want to see how
easy it is to send a cable test result to userspace. Anything which is
interested in this information can then listen for it. All the needed
code is there, you will just need to rearrange it a bit.

	   Andrew

quoted

Do these registers all conform to the standard? Can we pull this code
out into a library which all standards conformant PHY drivers can use?

According to opensig, this functionality should be present on all new T1 PHYs.
But the register/bit layout is no specified as standard. At least I was not able
to find it. I assume, current layout is TJA11xx specific.

O.K. then:

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

On 5/13/2020 5:34 AM, Oleksij Rempel wrote:

Add initial cable testing support.
This PHY needs only 100usec for this test and it is recommended to run it
before the link is up. For now, provide at least ethtool support, so it
can be tested by more developers.

This patch was tested with TJA1102 PHY with following results:
- No cable, is detected as open
- 1m cable, with no connected other end and detected as open
- a 40m cable (out of spec, max lenght should be 15m) is detected as OK.

Current patch do not provide polarity test support. This test would
indicate not proper wire connection, where "+" wire of main phy is
connected to the "-" wire of the link partner.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

From: Oleksij Rempel <o.rempel@pengutronix.de>
Date: Wed, 13 May 2020 14:34:40 +0200

Add initial cable testing support.
This PHY needs only 100usec for this test and it is recommended to run it
before the link is up. For now, provide at least ethtool support, so it
can be tested by more developers.

This patch was tested with TJA1102 PHY with following results:
- No cable, is detected as open
- 1m cable, with no connected other end and detected as open
- a 40m cable (out of spec, max lenght should be 15m) is detected as OK.

Current patch do not provide polarity test support. This test would
indicate not proper wire connection, where "+" wire of main phy is
connected to the "-" wire of the link partner.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Applied, thanks.

On Wed, May 13, 2020 at 08:01:40PM +0200, Andrew Lunn wrote:

quoted

What would be the best place to do a test before the link is getting up?
Can it be done in the phy core, or it should be done in the PHY driver?

So far, no action except of logging these errors is needed. 

You could do it in the config_aneg callback.

In this case I get two test cycles if the test was requested from user
space: from .cable_test_get_status and from .config_aneg

A kernel log entry is not very easy to use. You might want to see how
easy it is to send a cable test result to userspace. Anything which is
interested in this information can then listen for it. All the needed
code is there, you will just need to rearrange it a bit.

Indeed. I discovered" ethtool --monitor" for me. And the code is some
thing like this:
	ethnl_cable_test_alloc(phydev);
	phydev->drv->cable_test_start(phydev);
	usleep_range(100, 200);
	phydev->drv->cable_test_get_status(phydev, &finished);
	if (finished)
		ethnl_cable_test_finished(phydev);


Beside, what do you think about new result codes:
  ETHTOOL_A_CABLE_RESULT_CODE_POLARITY - if cable polarity is wrong (-
  connected to +)
  ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER - the link partner is active.
     The TJA1102 is able to detect it if partner link is master.

Regards,
Oleksij

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

On Thu, May 14, 2020 at 02:09:59PM +0200, Oleksij Rempel wrote:

On Wed, May 13, 2020 at 08:01:40PM +0200, Andrew Lunn wrote:

quoted

quoted

What would be the best place to do a test before the link is getting up?
Can it be done in the phy core, or it should be done in the PHY driver?

So far, no action except of logging these errors is needed. 

You could do it in the config_aneg callback.

In this case I get two test cycles if the test was requested from user
space: from .cable_test_get_status and from .config_aneg

Oh yes. Forgot about the restore after the test completes.

When do you want to run the test? When the interface is
administratively configured up, or when the link actually goes up?
You could do it in read_status(), when the link changes status.

quoted

A kernel log entry is not very easy to use. You might want to see how
easy it is to send a cable test result to userspace. Anything which is
interested in this information can then listen for it. All the needed
code is there, you will just need to rearrange it a bit.

Indeed. I discovered" ethtool --monitor" for me. And the code is some
thing like this:
	ethnl_cable_test_alloc(phydev);
	phydev->drv->cable_test_start(phydev);
	usleep_range(100, 200);
	phydev->drv->cable_test_get_status(phydev, &finished);
	if (finished)
		ethnl_cable_test_finished(phydev);

Yes, something like that.

Beside, what do you think about new result codes:
  ETHTOOL_A_CABLE_RESULT_CODE_POLARITY - if cable polarity is wrong (-
  connected to +)

Polarity should be a whole new nested pair property, not a status
extension. I think most PHYs are happy to work with the polarity
swapped. So we don't want it to sounds like an error. So status should
be OK and then the polarity property should then indicate it i
swapped. And you can only detected swapped polarity when the link is
up. So in most cases, you would not even include the properties, since
cable tests is normally performed on a down'ed link.

  ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER - the link partner is active.

     The TJA1102 is able to detect it if partner link is master.

master is not a cable diagnostics issue. This is a configuration
issue.

	Andrew

Hi Andrew,

On Wed, May 13, 2020 at 03:39:00PM +0200, Andrew Lunn wrote:

quoted

On Thu, May 14, 2020 at 02:09:59PM +0200, Oleksij Rempel wrote:
 ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER - the link partner is active.

     The TJA1102 is able to detect it if partner link is master.

master is not a cable diagnostics issue. This is a configuration
issue.

Master is very relevant for cable diagnostics, as a cable measurement should not be done with an active link partner on the other end (i.e. a PHY in master mode trying to train the link).

So if the measurement detects an active link partner disturbing the measurement, it is important to report this to the user.

Christian

On Thu, May 14, 2020 at 03:47:16PM +0000, Christian Herber wrote:

Hi Andrew,

quoted

On Wed, May 13, 2020 at 03:39:00PM +0200, Andrew Lunn wrote:

quoted

On Thu, May 14, 2020 at 02:09:59PM +0200, Oleksij Rempel wrote:
 ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER - the link partner is active.

     The TJA1102 is able to detect it if partner link is master.

master is not a cable diagnostics issue. This is a configuration
issue.

Master is very relevant for cable diagnostics, as a cable
measurement should not be done with an active link partner on the
other end (i.e. a PHY in master mode trying to train the link).

So if the measurement detects an active link partner disturbing the
measurement, it is important to report this to the user.

So with 'normal' PHYs, we use autoneg to make the link go quiet. But
you don't have autoneg.

If there is no way to force the link quiet, then
ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER makes sense. But we need to
keep the meaning generic. I don't want it to mean a T1 PHY with an
active master peer. It should be usable for any reason the link cannot
be made to go quiet.

	Andrew

On Thu, May 14, 2020 at 06:01:52PM +0200, Andrew Lunn wrote:

On Thu, May 14, 2020 at 03:47:16PM +0000, Christian Herber wrote:

quoted

Hi Andrew,

quoted

On Wed, May 13, 2020 at 03:39:00PM +0200, Andrew Lunn wrote:

quoted

On Thu, May 14, 2020 at 02:09:59PM +0200, Oleksij Rempel wrote:
 ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER - the link partner is active.

     The TJA1102 is able to detect it if partner link is master.

master is not a cable diagnostics issue. This is a configuration
issue.

quoted

Master is very relevant for cable diagnostics, as a cable
measurement should not be done with an active link partner on the
other end (i.e. a PHY in master mode trying to train the link).

quoted

So if the measurement detects an active link partner disturbing the
measurement, it is important to report this to the user.

So with 'normal' PHYs, we use autoneg to make the link go quiet. But
you don't have autoneg.

If there is no way to force the link quiet, then
ETHTOOL_A_CABLE_RESULT_CODE_ACTIVE_PARTNER makes sense. But we need to
keep the meaning generic. I don't want it to mean a T1 PHY with an
active master peer. It should be usable for any reason the link cannot
be made to go quiet.

It looks for me, like AT803X_CDT_STATUS_STAT_FAIL has the same reason as
ACTIVE PERTNER (Master) on TJA11xx.

What kind of meaning, naming would be generic?


-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |