[PATCH v5 45/48] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers

Subsystems: freescale quicc engine ucc hdlc driver, networking drivers, the rest

STALE2484d

Revision v5 of 2 in this series.

2 messages, 2 authors, 2019-11-20 · open the first message on its own page

[PATCH v5 45/48] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers

From: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Date: 2019-11-18 11:24:56 

When releasing the allocated muram resource, we rely on reading back
the offsets from the riptr/tiptr registers. But those registers are
__be16 (and we indeed write them using iowrite16be), so we can't just
read them back with a normal C dereference.

This is not currently a real problem, since for now the driver is
PPC32-only. But it will soon be allowed to be used on arm and arm64 as
well.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
 drivers/net/wan/fsl_ucc_hdlc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 405b24a5a60d..8d13586bb774 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -732,8 +732,8 @@ static int uhdlc_open(struct net_device *dev)
 
 static void uhdlc_memclean(struct ucc_hdlc_private *priv)
 {
-	qe_muram_free(priv->ucc_pram->riptr);
-	qe_muram_free(priv->ucc_pram->tiptr);
+	qe_muram_free(ioread16be(&priv->ucc_pram->riptr));
+	qe_muram_free(ioread16be(&priv->ucc_pram->tiptr));
 
 	if (priv->rx_bd_base) {
 		dma_free_coherent(priv->dev,
-- 
2.23.0

Re: [PATCH v5 45/48] net/wan/fsl_ucc_hdlc: fix reading of __be16 registers

From: Li Yang <hidden>
Date: 2019-11-20 17:53:08 

On Mon, Nov 18, 2019 at 5:26 AM Rasmus Villemoes
[off-list ref] wrote:
Hi David,

What do you think about the patch 45-47 from the series for net
related changes?  If it is ok with you, I can merge them with the
whole series through the soc tree with your ACK.

Regards,
Leo
quoted hunk
When releasing the allocated muram resource, we rely on reading back
the offsets from the riptr/tiptr registers. But those registers are
__be16 (and we indeed write them using iowrite16be), so we can't just
read them back with a normal C dereference.

This is not currently a real problem, since for now the driver is
PPC32-only. But it will soon be allowed to be used on arm and arm64 as
well.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
---
 drivers/net/wan/fsl_ucc_hdlc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c
index 405b24a5a60d..8d13586bb774 100644
--- a/drivers/net/wan/fsl_ucc_hdlc.c
+++ b/drivers/net/wan/fsl_ucc_hdlc.c
@@ -732,8 +732,8 @@ static int uhdlc_open(struct net_device *dev)

 static void uhdlc_memclean(struct ucc_hdlc_private *priv)
 {
-       qe_muram_free(priv->ucc_pram->riptr);
-       qe_muram_free(priv->ucc_pram->tiptr);
+       qe_muram_free(ioread16be(&priv->ucc_pram->riptr));
+       qe_muram_free(ioread16be(&priv->ucc_pram->tiptr));

        if (priv->rx_bd_base) {
                dma_free_coherent(priv->dev,
--
2.23.0
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