[PATCH] net: dsa: add missing phy address offset

When phys do not start at address 0 like on the mv88e6341 the wrong
phy address is used and therefore the slave ports can not be
initialized. This patch adds the proper offset to the phy address.

Signed-off-by: Marcel Reichmuth <redacted>
---
 drivers/net/dsa/mv88e6xxx/chip.c | 3 +++
 include/net/dsa.h                | 1 +
 net/dsa/slave.c                  | 3 ++-
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 12fd7ce3f1ff..0ca649f784d2 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c

@@ -2198,12 +2198,15 @@ static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port)
 static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
 {
 	struct dsa_switch *ds = chip->ds;
+	struct dsa_port *dp = &ds->ports[port];
 	int err;
 	u16 reg;
 
 	chip->ports[port].chip = chip;
 	chip->ports[port].port = port;
 
+	dp->phy_base_addr = chip->info->phy_base_addr;
+
 	/* MAC Forcing register: don't force link, speed, duplex or flow control
 	 * state to any particular values on physical ports, but force the CPU
 	 * port and all DSA ports to their maximum bandwidth and full duplex.

diff --git a/include/net/dsa.h b/include/net/dsa.h
index b3eefe8e18fd..f9c9dc1f6d21 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h

@@ -196,6 +196,7 @@ struct dsa_port {
 
 	struct dsa_switch	*ds;
 	unsigned int		index;
+	unsigned int		phy_base_addr;
 	const char		*name;
 	const struct dsa_port	*cpu_dp;
 	struct device_node	*dn;

diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index a1c9fe155057..4f67dff34a3b 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c

@@ -1221,7 +1221,8 @@ static int dsa_slave_phy_setup(struct net_device *slave_dev)
 		/* We could not connect to a designated PHY or SFP, so use the
 		 * switch internal MDIO bus instead
 		 */
-		ret = dsa_slave_phy_connect(slave_dev, dp->index);
+		ret = dsa_slave_phy_connect(slave_dev, dp->phy_base_addr +
+			dp->index);
 		if (ret) {
 			netdev_err(slave_dev,
 				   "failed to connect to port %d: %d\n",

-- 
2.11.0

On 2/20/19 10:15 AM, Marcel Reichmuth wrote:

When phys do not start at address 0 like on the mv88e6341 the wrong
phy address is used and therefore the slave ports can not be
initialized. This patch adds the proper offset to the phy address.

Signed-off-by: Marcel Reichmuth <redacted>

You are supposed to describe the port to PHY mapping using the binding,
so for instance:

ports {
	port@0 {
		reg = <0>;
		phy-handle = <&phy1>;
	};

};

mdio {
	phy1: phy@1 {
		reg = <1>;
	};
};

etc. is not that working for you?

-- 
Florian

On Wed, Feb 20, 2019 at 11:27:16AM -0800, Florian Fainelli wrote:

On 2/20/19 10:15 AM, Marcel Reichmuth wrote:

quoted

When phys do not start at address 0 like on the mv88e6341 the wrong
phy address is used and therefore the slave ports can not be
initialized. This patch adds the proper offset to the phy address.

Signed-off-by: Marcel Reichmuth <redacted>

You are supposed to describe the port to PHY mapping using the binding,
so for instance:

ports {
	port@0 {
		reg = <0>;
		phy-handle = <&phy1>;
	};

};

mdio {
	phy1: phy@1 {
		reg = <1>;
	};
};

etc. is not that working for you?

The Espressobin does exactly this:

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts 

It also uses the 6341.

	Andrew

On Wed, Feb 20, 2019 at 08:31:22PM +0100, Andrew Lunn wrote:

On Wed, Feb 20, 2019 at 11:27:16AM -0800, Florian Fainelli wrote:

quoted

On 2/20/19 10:15 AM, Marcel Reichmuth wrote:

You are supposed to describe the port to PHY mapping using the binding,
so for instance:

ports {
	port@0 {
		reg = <0>;
		phy-handle = <&phy1>;
	};

};

mdio {
	phy1: phy@1 {
		reg = <1>;
	};
};

etc. is not that working for you?

The Espressobin does exactly this:

arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts 

It also uses the 6341.

Thank you very much for your hints. Yes that works indeed too. I
just assumed it was intended to work automatically with the 
built-in phys as it does with the other switches I am using.

Thank you very much for your hints. Yes that works indeed too. I
just assumed it was intended to work automatically with the 
built-in phys as it does with the other switches I am using.

Hi Marcel

The basic assumption is there is a one to one mapping of port number
to PHY address. All the other Marvell switch have this mapping.

Since the needed flexibility exists to support this, and Marvell has
not repeated this odd design, i decided not to do anything about it in
code.

	Andrew