On 08.08.2013 18:14, Petko Manolov wrote:
On Wed, 7 Aug 2013, Jussi Kivilinna wrote:
quoted
rtl8150 allocates URB transfer_buffer and setup_packet as part of same
structure 'struct async_req'. This can cause same cacheline to be
DMA-mapped twice with same URB. This can lead to memory corruption on
some systems.
I can see performance impact due to the double mapping. However, memory
corruption seems a bit too much for sane cache and DMA controllers. Out
of interest - which is the architecture that will potentially corrupt the
memory.
rtlwifi driver had similar structure to allocate both setup_packet and transfer_buffer in single go (overlapping dma-mapping cachelines) and this caused problems on ARM/sunxi. Problems means: memory corruptions at random locations, device freezes and lock-ups.
-Jussi
cheers,
Petko
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On Thu, 8 Aug 2013, Jussi Kivilinna wrote:
On 08.08.2013 18:14, Petko Manolov wrote:
quoted
On Wed, 7 Aug 2013, Jussi Kivilinna wrote:
quoted
rtl8150 allocates URB transfer_buffer and setup_packet as part of same
structure 'struct async_req'. This can cause same cacheline to be
DMA-mapped twice with same URB. This can lead to memory corruption on
some systems.
I can see performance impact due to the double mapping. However, memory
corruption seems a bit too much for sane cache and DMA controllers. Out
of interest - which is the architecture that will potentially corrupt the
memory.
rtlwifi driver had similar structure to allocate both setup_packet and
transfer_buffer in single go (overlapping dma-mapping cachelines) and
this caused problems on ARM/sunxi. Problems means: memory corruptions at
random locations, device freezes and lock-ups.
Broken controllers?..
On 09.08.2013 21:50, Petko Manolov wrote:
On Thu, 8 Aug 2013, Jussi Kivilinna wrote:
quoted
On 08.08.2013 18:14, Petko Manolov wrote:
quoted
On Wed, 7 Aug 2013, Jussi Kivilinna wrote:
quoted
rtl8150 allocates URB transfer_buffer and setup_packet as part of same
structure 'struct async_req'. This can cause same cacheline to be
DMA-mapped twice with same URB. This can lead to memory corruption on
some systems.
I can see performance impact due to the double mapping. However, memory
corruption seems a bit too much for sane cache and DMA controllers. Out
of interest - which is the architecture that will potentially corrupt the
memory.
rtlwifi driver had similar structure to allocate both setup_packet and
transfer_buffer in single go (overlapping dma-mapping cachelines) and
this caused problems on ARM/sunxi. Problems means: memory corruptions at
random locations, device freezes and lock-ups.
Broken controllers?..
At first I thought so too, but I discussed about this at linux-usb, and answer
was that driver which uses same (dma/-)cacheline for multiple buffers is buggy..
http://marc.info/?l=linux-usb&m=137130407121137&w=2 (at end)
http://marc.info/?l=linux-usb&m=137137080902265&w=2
http://marc.info/?l=linux-usb&m=137242422120782&w=2
-Jussi