This patchset aims at fixing a system hang when loading the mvneta module.
I'm not sure what's meaning of the magical value used in patch 2 but at least,
it's used in code from Marvell and make things work.
Regards,
Arnaud
When the mvneta driver is compiled, it'll be loaded with clocks disabled.
This implies that the clocks should be enabled again before any register
access or it'll hang.
To fix it:
- enable clock earlier
- move timer callback after setting timer.data
Signed-off-by: Arnaud Patard <redacted>
Index: linux-next/drivers/net/ethernet/marvell/mvneta.c
===================================================================
When the mvneta driver is compiled as module, the clock is disabled before
it's loading. This will reset the registers values and all configuration
made by the bootloader.
This patch sets the "sgmii serdes configuration" register to a magical value
found in:
https://github.com/yellowback/ubuntu-precise-armadaxp/blob/master/arch/arm/mach-armadaxp/armada_xp_family/ctrlEnv/mvCtrlEnvLib.c
With this change, the interrupts are working/generated and ethernet is
working.
Signed-off-by: Arnaud Patard <redacted>
Index: linux-next/drivers/net/ethernet/marvell/mvneta.c
===================================================================
According to the Armada XP functional datasheet, this magical value
0xCC7 is the one to be used to configure a SERDES interface to use the
"Protocol Generation Setting" SGMII. There are other magical values for
DRSGMII, SQGMII, SATA Gen I and SATA Gen II. So you could really do:
#define MVNETA_SGMII_SERDES_PROTO 0xcc7
quoted hunk
With this change, the interrupts are working/generated and ethernet is
working.
Signed-off-by: Arnaud Patard <redacted>
Index: linux-next/drivers/net/ethernet/marvell/mvneta.c
===================================================================
You are not using this last define in your patch. Please also use
MVNETA_ prefix for those defines, like all the other ones.
However, there is one thing that I am not understanding completely. The
C code you pointed above seems to do the following:
pRegAddr[3] = SGMII_SERDES_CFG_REG(sgmiiPort);
pRegAddr[4] = SGMII_SERDES_STAT_REG(sgmiiPort);
[..]
pRegVal[3] = (pSerdesInfo->busSpeed & (1 << serdesLineNum)) != 0 ? 0x1547 : 0xCC7;
pRegVal[4] = 0x7;
So:
1) In some conditions, it will use the 0x1547 value in some cases, and
0xCC7 in the other ones. And interestingly, the datasheet doesn't
mention what the 0x1547 magical value is.
2) It writes 0x7 to the SGMII_SERDES_STAT_REG register, but the
datasheet mentions this register as a read-only register.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
According to the Armada XP functional datasheet, this magical value
0xCC7 is the one to be used to configure a SERDES interface to use the
"Protocol Generation Setting" SGMII. There are other magical values for
DRSGMII, SQGMII, SATA Gen I and SATA Gen II. So you could really do:
#define MVNETA_SGMII_SERDES_PROTO 0xcc7
ok.
quoted
With this change, the interrupts are working/generated and ethernet is
working.
Signed-off-by: Arnaud Patard <redacted>
Index: linux-next/drivers/net/ethernet/marvell/mvneta.c
===================================================================
You are not using this last define in your patch. Please also use
MVNETA_ prefix for those defines, like all the other ones.
However, there is one thing that I am not understanding completely. The
C code you pointed above seems to do the following:
pRegAddr[3] = SGMII_SERDES_CFG_REG(sgmiiPort);
pRegAddr[4] = SGMII_SERDES_STAT_REG(sgmiiPort);
[..]
pRegVal[3] = (pSerdesInfo->busSpeed & (1 << serdesLineNum)) != 0 ? 0x1547 : 0xCC7;
pRegVal[4] = 0x7;
So:
1) In some conditions, it will use the 0x1547 value in some cases, and
0xCC7 in the other ones. And interestingly, the datasheet doesn't
mention what the 0x1547 magical value is.
The problem I got was that I didn't understand how to 'translate' the
(1 << serdesLineNum) part, so I removed it. Moreover, dumping the
registers when everything built-in (aka 'working'), I read a value
corresponding to the 0xcc7 case but not the other one so it seemed to me
it was safer to not use the 0x1547 case.
2) It writes 0x7 to the SGMII_SERDES_STAT_REG register, but the
datasheet mentions this register as a read-only register.
weird. Can be remains of code for old tape outs or something wrong on
the doc, 'fixed' in some pdf about erratas.
Thanks,
Arnaud
From: Thomas Petazzoni <hidden> Date: 2013-07-15 14:34:47
Dear Arnaud Patard (Rtp),
On Fri, 21 Jun 2013 00:06:44 +0200, Arnaud Patard (Rtp) wrote:
This patchset aims at fixing a system hang when loading the mvneta module.
I'm not sure what's meaning of the magical value used in patch 2 but at least,
it's used in code from Marvell and make things work.
3.11-rc1 is now out. Do you intend to resend an updated version of your
patch set, fixed according to the previous discussions?
Thanks!
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com