skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

10 messages, 4 authors, 2012-10-08 · open the first message on its own page

skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Graham Gower <hidden>
Date: 2012-10-07 05:55:52

Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.

This issue has been around for years and a fix was sent 3.5 years ago, but
there was some debate as to whether it should instead be fixed as a PCI quirk.
http://www.spinics.net/lists/netdev/msg88670.html

However, 18 months later a similar workaround was introduced for another
chipset exhibiting the same problem.
http://www.spinics.net/lists/netdev/msg142287.html

Signed-off-by: Graham Gower <redacted>
--- skge.c.bak	2012-10-07 13:00:56.000000000 +1030
+++ skge.c	2012-10-07 13:26:03.000000000 +1030
@@ -4143,6 +4143,13 @@
 			DMI_MATCH(DMI_BOARD_NAME, "nForce"),
 		},
 	},
+	{
+		.ident = "ASUS P5NSLI",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P5NSLI")
+		},
+	},
 	{}
 };
 

Re: skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Jan Ceuleers <hidden>
Date: 2012-10-07 09:35:15

On 10/07/2012 07:55 AM, Graham Gower wrote:
quoted hunk
Signed-off-by: Graham Gower <redacted>
--- skge.c.bak    2012-10-07 13:00:56.000000000 +1030
+++ skge.c    2012-10-07 13:26:03.000000000 +1030
@@ -4143,6 +4143,13 @@
Graham,

Your patch should include the path to the file being patched relative to
the base directory. So in this case something like
--- a/drivers/net/ethernet/marvell/skge.c ...
+++ b/drivers/net/ethernet/marvell/skge.c ...
HTH, Jan

Re: skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Graham Gower <hidden>
Date: 2012-10-08 05:33:35

On 10/07/2012 08:02 PM, Jan Ceuleers wrote:
quoted hunk
On 10/07/2012 07:55 AM, Graham Gower wrote:
quoted
Signed-off-by: Graham Gower <redacted>
--- skge.c.bak    2012-10-07 13:00:56.000000000 +1030
+++ skge.c    2012-10-07 13:26:03.000000000 +1030
@@ -4143,6 +4143,13 @@
Graham,

Your patch should include the path to the file being patched relative to
the base directory. So in this case something like
--- a/drivers/net/ethernet/marvell/skge.c ...
+++ b/drivers/net/ethernet/marvell/skge.c ...
HTH, Jan
Thanks, I should know this stuff. Just an oversight because I was
too lazy to clone a repository and diffed against the single file.

-Graham

[PATCH v2] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Graham Gower <hidden>
Date: 2012-10-08 05:33:44

Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.

This issue has been around for years and a fix was sent 3.5 years ago, but
there was some debate as to whether it should instead be fixed as a PCI quirk.
http://www.spinics.net/lists/netdev/msg88670.html

However, 18 months later a similar workaround was introduced for another
chipset exhibiting the same problem.
http://www.spinics.net/lists/netdev/msg142287.html

Signed-off-by: Graham Gower <redacted>
--- a/drivers/net/ethernet/marvell/skge.c
+++ b/drivers/net/ethernet/marvell/skge.c
@@ -4143,6 +4143,13 @@
 			DMI_MATCH(DMI_BOARD_NAME, "nForce"),
 		},
 	},
+	{
+		.ident = "ASUS P5NSLI",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P5NSLI")
+		},
+	},
 	{}
 };
 

Re: [PATCH v2] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: David Miller <davem@davemloft.net>
Date: 2012-10-08 05:36:39

From: Graham Gower <redacted>
Date: Mon, 08 Oct 2012 16:03:44 +1030
quoted hunk
+		.ident = "ASUS P5NSLI",
+		.matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P5NSLI")
This is poorly formatted, and your commit message has newlines
in very abrupt places as if you formatted it in your email client
GUI rather than in a text editor.

[PATCH v3] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Graham Gower <hidden>
Date: 2012-10-08 05:54:45

Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.

This issue has been around for years and a fix was sent 3.5 years ago, but
there was some debate as to whether it should instead be fixed as a PCI quirk.
http://www.spinics.net/lists/netdev/msg88670.html

However, 18 months later a similar workaround was introduced for another
chipset exhibiting the same problem.
http://www.spinics.net/lists/netdev/msg142287.html

Signed-off-by: Graham Gower <redacted>

--- a/drivers/net/ethernet/marvell/skge.c
+++ b/drivers/net/ethernet/marvell/skge.c
@@ -4143,6 +4143,13 @@
 			DMI_MATCH(DMI_BOARD_NAME, "nForce"),
 		},
 	},
+	{
+		.ident = "ASUS P5NSLI",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P5NSLI")
+		},
+	},
 	{}
 };
 

Re: [PATCH v3] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: David Miller <davem@davemloft.net>
Date: 2012-10-08 06:11:31

From: Graham Gower <redacted>
Date: Mon, 08 Oct 2012 16:24:44 +1030
Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to
send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.
This is still oddly formatted.
quoted hunk
+	{
+		.ident = "ASUS P5NSLI",
+		.matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
And this is even worse than before.

Re: [PATCH v3] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Graham Gower <hidden>
Date: 2012-10-08 06:15:34

Thunderbird must be screwing it. I hate mail clients. If I just pipe
the message to 'mail',
with a correct 'From:' line is that ok, or do I have to figure
something else out?

On 8 October 2012 16:41, David Miller [off-list ref] wrote:
From: Graham Gower <redacted>
Date: Mon, 08 Oct 2012 16:24:44 +1030
quoted
Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to
send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.
This is still oddly formatted.
quoted
+     {
+             .ident = "ASUS P5NSLI",
+             .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
And this is even worse than before.

Re: [PATCH v3] skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: David Miller <davem@davemloft.net>
Date: 2012-10-08 06:21:05

From: Graham Gower <redacted>
Date: Mon, 8 Oct 2012 16:45:33 +1030
Thunderbird must be screwing it. I hate mail clients. If I just pipe
the message to 'mail',
with a correct 'From:' line is that ok, or do I have to figure
something else out?
Documentation/email-clients.txt

Re: skge: Add DMA mask quirk for Marvell 88E8001 on ASUS P5NSLI motherboard.

From: Stephen Hemminger <hidden>
Date: 2012-10-08 16:16:48

On Sun, 07 Oct 2012 16:25:45 +1030
Graham Gower [off-list ref] wrote:
quoted hunk
Marvell 88E8001 on an ASUS P5NSLI motherboard is unable to send/receive
packets on a system with >4gb ram unless a 32bit DMA mask is used.

This issue has been around for years and a fix was sent 3.5 years ago, but
there was some debate as to whether it should instead be fixed as a PCI quirk.
http://www.spinics.net/lists/netdev/msg88670.html

However, 18 months later a similar workaround was introduced for another
chipset exhibiting the same problem.
http://www.spinics.net/lists/netdev/msg142287.html

Signed-off-by: Graham Gower <redacted>
--- skge.c.bak	2012-10-07 13:00:56.000000000 +1030
+++ skge.c	2012-10-07 13:26:03.000000000 +1030
@@ -4143,6 +4143,13 @@
  			DMI_MATCH(DMI_BOARD_NAME, "nForce"),
  		},
  	},
+	{
+		.ident = "ASUS P5NSLI",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "P5NSLI")
+		},
+	},
  	{}
  };
  
This fix is fine, but like Jan said it needs to be based at the
right place in the filesystem tree for inclusion.

I wonder if it would be a good idea to add a way to automatically
check for this quirk using the debug registers on the chip which allow
peeking. Using the test registers B3_RAM_DATA_LO/B3_RAM_DATA_HI.

The problem is that might introduce worse problems if it causes
DMA access to non-existent memory and trying to recover from the fault.
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