[PATCH] flexcan: disable bus error interrupts for the i.MX28

Subsystems: can network drivers, the rest

STALE5052d

13 messages, 5 authors, 2012-10-11 · open the first message on its own page

[PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Wolfgang Grandegger <hidden>
Date: 2012-09-28 13:17:17

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

Wolfgang.


 drivers/net/can/flexcan.c |   29 +++++++++++++++++++----------
 1 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index c5f1431..c78ecfc 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c

@@ -144,6 +144,10 @@
 
 #define FLEXCAN_MB_CODE_MASK		(0xf0ffffff)
 
+/* FLEXCAN hardware feature flags */
+#define FLEXCAN_HAS_V10_FEATURES	BIT(1) /* For core version >= 10 */
+#define FLEXCAN_HAS_BROKEN_ERR_STATE	BIT(2) /* Broken error state handling */
+
 /* Structure of the message buffer */
 struct flexcan_mb {
 	u32 can_ctrl;

@@ -178,7 +182,7 @@ struct flexcan_regs {
 };
 
 struct flexcan_devtype_data {
-	u32 hw_ver;	/* hardware controller version */
+	u32 features;	/* hardware controller features */
 };
 
 struct flexcan_priv {

@@ -197,11 +201,11 @@ struct flexcan_priv {
 };
 
 static struct flexcan_devtype_data fsl_p1010_devtype_data = {
-	.hw_ver = 3,
+	.features = FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
-
+static struct flexcan_devtype_data fsl_imx28_devtype_data;
 static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
-	.hw_ver = 10,
+	.features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
 
 static const struct can_bittiming_const flexcan_bittiming_const = {

@@ -741,15 +745,19 @@ static int flexcan_chip_start(struct net_device *dev)
 	 * enable tx and rx warning interrupt
 	 * enable bus off interrupt
 	 * (== FLEXCAN_CTRL_ERR_STATE)
-	 *
-	 * _note_: we enable the "error interrupt"
-	 * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any
-	 * warning or bus passive interrupts.
 	 */
 	reg_ctrl = flexcan_read(&regs->ctrl);
 	reg_ctrl &= ~FLEXCAN_CTRL_TSYN;
 	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |
-		FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK;
+		FLEXCAN_CTRL_ERR_STATE;
+	/*
+	 * enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),
+	 * on most Flexcan cores, too. Otherwise we don't get
+	 * any error warning or passive interrupts.
+	 */
+	if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
+	    priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
+		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
 
 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;

@@ -772,7 +780,7 @@ static int flexcan_chip_start(struct net_device *dev)
 	flexcan_write(0x0, &regs->rx14mask);
 	flexcan_write(0x0, &regs->rx15mask);
 
-	if (priv->devtype_data->hw_ver >= 10)
+	if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
 		flexcan_write(0x0, &regs->rxfgmask);
 
 	flexcan_transceiver_switch(priv, 1);

@@ -954,6 +962,7 @@ static void __devexit unregister_flexcandev(struct net_device *dev)
 
 static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
+	{ .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
 	{ .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
 	{ /* sentinel */ },
 };

-- 
1.7.7.6

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Hui Wang <hidden>
Date: 2012-09-29 06:00:26

Wolfgang Grandegger wrote:

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch

s/necessay/necessary/


Other looks fine to me.  Reviewed-by:  Hui Wang [off-list ref]

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Shawn Guo <hidden>
Date: 2012-10-07 03:09:03

On Fri, Sep 28, 2012 at 03:17:15PM +0200, Wolfgang Grandegger wrote:

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a newer
version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm. 

Shawn

quoted hunk

Wolfgang.


 drivers/net/can/flexcan.c |   29 +++++++++++++++++++----------
 1 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index c5f1431..c78ecfc 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c

@@ -144,6 +144,10 @@
 
 #define FLEXCAN_MB_CODE_MASK		(0xf0ffffff)
 
+/* FLEXCAN hardware feature flags */
+#define FLEXCAN_HAS_V10_FEATURES	BIT(1) /* For core version >= 10 */
+#define FLEXCAN_HAS_BROKEN_ERR_STATE	BIT(2) /* Broken error state handling */
+
 /* Structure of the message buffer */
 struct flexcan_mb {
 	u32 can_ctrl;

@@ -178,7 +182,7 @@ struct flexcan_regs {
 };
 
 struct flexcan_devtype_data {
-	u32 hw_ver;	/* hardware controller version */
+	u32 features;	/* hardware controller features */
 };
 
 struct flexcan_priv {

@@ -197,11 +201,11 @@ struct flexcan_priv {
 };
 
 static struct flexcan_devtype_data fsl_p1010_devtype_data = {
-	.hw_ver = 3,
+	.features = FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
-
+static struct flexcan_devtype_data fsl_imx28_devtype_data;
 static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
-	.hw_ver = 10,
+	.features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
 
 static const struct can_bittiming_const flexcan_bittiming_const = {

@@ -741,15 +745,19 @@ static int flexcan_chip_start(struct net_device *dev)
 	 * enable tx and rx warning interrupt
 	 * enable bus off interrupt
 	 * (== FLEXCAN_CTRL_ERR_STATE)
-	 *
-	 * _note_: we enable the "error interrupt"
-	 * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any
-	 * warning or bus passive interrupts.
 	 */
 	reg_ctrl = flexcan_read(&regs->ctrl);
 	reg_ctrl &= ~FLEXCAN_CTRL_TSYN;
 	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |
-		FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK;
+		FLEXCAN_CTRL_ERR_STATE;
+	/*
+	 * enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),
+	 * on most Flexcan cores, too. Otherwise we don't get
+	 * any error warning or passive interrupts.
+	 */
+	if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
+	    priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
+		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
 
 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;

@@ -772,7 +780,7 @@ static int flexcan_chip_start(struct net_device *dev)
 	flexcan_write(0x0, &regs->rx14mask);
 	flexcan_write(0x0, &regs->rx15mask);
 
-	if (priv->devtype_data->hw_ver >= 10)
+	if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
 		flexcan_write(0x0, &regs->rxfgmask);
 
 	flexcan_transceiver_switch(priv, 1);

@@ -954,6 +962,7 @@ static void __devexit unregister_flexcandev(struct net_device *dev)
 
 static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
+	{ .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
 	{ .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
 	{ /* sentinel */ },
 };

-- 
1.7.7.6

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Wolfgang Grandegger <hidden>
Date: 2012-10-07 14:48:44

On 10/07/2012 05:09 AM, Shawn Guo wrote:

On Fri, Sep 28, 2012 at 03:17:15PM +0200, Wolfgang Grandegger wrote:

quoted

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a newer
version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN adapter
:(, unfortunately. Otherwise I would try it out myself.

Wolfgang.

quoted

 drivers/net/can/flexcan.c |   29 +++++++++++++++++++----------
 1 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index c5f1431..c78ecfc 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c

@@ -144,6 +144,10 @@
 
 #define FLEXCAN_MB_CODE_MASK		(0xf0ffffff)
 
+/* FLEXCAN hardware feature flags */
+#define FLEXCAN_HAS_V10_FEATURES	BIT(1) /* For core version >= 10 */
+#define FLEXCAN_HAS_BROKEN_ERR_STATE	BIT(2) /* Broken error state handling */
+
 /* Structure of the message buffer */
 struct flexcan_mb {
 	u32 can_ctrl;

@@ -178,7 +182,7 @@ struct flexcan_regs {
 };
 
 struct flexcan_devtype_data {
-	u32 hw_ver;	/* hardware controller version */
+	u32 features;	/* hardware controller features */
 };
 
 struct flexcan_priv {

@@ -197,11 +201,11 @@ struct flexcan_priv {
 };
 
 static struct flexcan_devtype_data fsl_p1010_devtype_data = {
-	.hw_ver = 3,
+	.features = FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
-
+static struct flexcan_devtype_data fsl_imx28_devtype_data;
 static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
-	.hw_ver = 10,
+	.features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
 
 static const struct can_bittiming_const flexcan_bittiming_const = {

@@ -741,15 +745,19 @@ static int flexcan_chip_start(struct net_device *dev)
 	 * enable tx and rx warning interrupt
 	 * enable bus off interrupt
 	 * (== FLEXCAN_CTRL_ERR_STATE)
-	 *
-	 * _note_: we enable the "error interrupt"
-	 * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any
-	 * warning or bus passive interrupts.
 	 */
 	reg_ctrl = flexcan_read(&regs->ctrl);
 	reg_ctrl &= ~FLEXCAN_CTRL_TSYN;
 	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |
-		FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK;
+		FLEXCAN_CTRL_ERR_STATE;
+	/*
+	 * enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),
+	 * on most Flexcan cores, too. Otherwise we don't get
+	 * any error warning or passive interrupts.
+	 */
+	if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
+	    priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
+		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
 
 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;

@@ -772,7 +780,7 @@ static int flexcan_chip_start(struct net_device *dev)
 	flexcan_write(0x0, &regs->rx14mask);
 	flexcan_write(0x0, &regs->rx15mask);
 
-	if (priv->devtype_data->hw_ver >= 10)
+	if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
 		flexcan_write(0x0, &regs->rxfgmask);
 
 	flexcan_transceiver_switch(priv, 1);

@@ -954,6 +962,7 @@ static void __devexit unregister_flexcandev(struct net_device *dev)
 
 static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
+	{ .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
 	{ .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
 	{ /* sentinel */ },
 };

-- 
1.7.7.6

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RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Dong Aisheng-B29396 <hidden>
Date: 2012-10-08 07:59:58

Hi Wolfgang,

On 10/07/2012 05:09 AM, Shawn Guo wrote:

quoted

On Fri, Sep 28, 2012 at 03:17:15PM +0200, Wolfgang Grandegger wrote:

quoted

Due to a bug in most Flexcan cores, the bus error interrupt needs to
be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a
newer version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN adapter :(,
unfortunately. Otherwise I would try it out myself.

How did you verify this issue?
I just checked our ic guy of flexcan, it seems he also had no sense of this issue.

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version 03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00
I'm not sure if mx6q has such issue.

Regards
Dong Aisheng

quoted

 drivers/net/can/flexcan.c |   29 +++++++++++++++++++----------
 1 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index c5f1431..c78ecfc 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c

@@ -144,6 +144,10 @@

 #define FLEXCAN_MB_CODE_MASK		(0xf0ffffff)

+/* FLEXCAN hardware feature flags */
+#define FLEXCAN_HAS_V10_FEATURES	BIT(1) /* For core version >= 10

*/

quoted

+#define FLEXCAN_HAS_BROKEN_ERR_STATE	BIT(2) /* Broken error state

handling */

quoted

+
 /* Structure of the message buffer */  struct flexcan_mb {
 	u32 can_ctrl;

@@ -178,7 +182,7 @@ struct flexcan_regs {  };

 struct flexcan_devtype_data {
-	u32 hw_ver;	/* hardware controller version */
+	u32 features;	/* hardware controller features */
 };

 struct flexcan_priv {
@@ -197,11 +201,11 @@ struct flexcan_priv {  };

 static struct flexcan_devtype_data fsl_p1010_devtype_data = {
-	.hw_ver = 3,
+	.features = FLEXCAN_HAS_BROKEN_ERR_STATE,
 };
-
+static struct flexcan_devtype_data fsl_imx28_devtype_data;
 static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
-	.hw_ver = 10,
+	.features = FLEXCAN_HAS_V10_FEATURES |
+FLEXCAN_HAS_BROKEN_ERR_STATE,
 };

 static const struct can_bittiming_const flexcan_bittiming_const = {
@@ -741,15 +745,19 @@ static int flexcan_chip_start(struct net_device

*dev)

quoted

 	 * enable tx and rx warning interrupt
 	 * enable bus off interrupt
 	 * (== FLEXCAN_CTRL_ERR_STATE)
-	 *
-	 * _note_: we enable the "error interrupt"
-	 * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any
-	 * warning or bus passive interrupts.
 	 */
 	reg_ctrl = flexcan_read(&regs->ctrl);
 	reg_ctrl &= ~FLEXCAN_CTRL_TSYN;
 	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |
-		FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK;
+		FLEXCAN_CTRL_ERR_STATE;
+	/*
+	 * enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),
+	 * on most Flexcan cores, too. Otherwise we don't get
+	 * any error warning or passive interrupts.
+	 */
+	if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
+	    priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
+		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;

 	/* save for later use */
 	priv->reg_ctrl_default = reg_ctrl;

@@ -772,7 +780,7 @@ static int flexcan_chip_start(struct net_device

*dev)

quoted

 	flexcan_write(0x0, &regs->rx14mask);
 	flexcan_write(0x0, &regs->rx15mask);

-	if (priv->devtype_data->hw_ver >= 10)
+	if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
 		flexcan_write(0x0, &regs->rxfgmask);

 	flexcan_transceiver_switch(priv, 1); @@ -954,6 +962,7 @@ static
void __devexit unregister_flexcandev(struct net_device *dev)

 static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,p1010-flexcan", .data =
&fsl_p1010_devtype_data, },
+	{ .compatible = "fsl,imx28-flexcan", .data =
+&fsl_imx28_devtype_data, },
 	{ .compatible = "fsl,imx6q-flexcan", .data =

&fsl_imx6q_devtype_data, },

quoted

 	{ /* sentinel */ },
 };
--
1.7.7.6

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Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Wolfgang Grandegger <hidden>
Date: 2012-10-08 09:03:53

Hi Dong,

On 10/08/2012 09:59 AM, Dong Aisheng-B29396 wrote:

Hi Wolfgang,

quoted

On 10/07/2012 05:09 AM, Shawn Guo wrote:

quoted

On Fri, Sep 28, 2012 at 03:17:15PM +0200, Wolfgang Grandegger wrote:

quoted

Due to a bug in most Flexcan cores, the bus error interrupt needs to
be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a
newer version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN adapter :(,
unfortunately. Otherwise I would try it out myself.

How did you verify this issue?

I provoke state changes, e.g. by sending a message without connection to
the bus. On the Mx28, the TWRN_INT/RWRN_INT/(BOFF_INT?) does trigger the
corresponding interrupt. This does not work properly on some other
cores, e.g. the Mx35. Therefore we enable ERR_INT for those cores to
realize state changes.

I just checked our ic guy of flexcan, it seems he also had no sense of this issue.

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version 03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00
I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Wolfgang.

RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Dong Aisheng-B29396 <hidden>
Date: 2012-10-08 09:13:57

Hi Wolfgang,

Hi Dong,

On 10/08/2012 09:59 AM, Dong Aisheng-B29396 wrote:

quoted

Hi Wolfgang,

quoted

On 10/07/2012 05:09 AM, Shawn Guo wrote:

quoted

On Fri, Sep 28, 2012 at 03:17:15PM +0200, Wolfgang Grandegger wrote:

quoted

Due to a bug in most Flexcan cores, the bus error interrupt needs
to be enabled. Otherwise we don't get any error warning or passive
interrupts. This is _not_ necessay for the i.MX28 and this patch
disables bus error interrupts if "berr-reporting" is not requested.
This avoids bus error flooding, which might harm, especially on
low-end systems.

To handle such quirks of the Flexcan cores, a hardware feature flag
has been introduced, also replacing the "hw_ver" variable. So far
nobody could tell what Flexcan core version is available on what
Freescale SOC, apart from the i.MX6Q and P1010, and which bugs or
features are present on the various "hw_rev".

CC: Hui Wang <redacted>
CC: Shawn Guo <redacted>
Signed-off-by: Wolfgang Grandegger <redacted>
---

Concerning the bug, I know that the i.MX35 does have it. Maybe
other Flexcan cores than on the i.MX28 does *not* have it either.
If you have a chance, please check on the P1010, i.MX6Q, i.MX51,
i.MX53, etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same
version,

so they should all have the bug.  And for i.MX6Q, since it uses a
newer version even than i.MX28, I would believe it's affected by the

bug.

quoted

But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN
adapter :(, unfortunately. Otherwise I would try it out myself.

How did you verify this issue?

I provoke state changes, e.g. by sending a message without connection to
the bus. On the Mx28, the TWRN_INT/RWRN_INT/(BOFF_INT?) does trigger the
corresponding interrupt. This does not work properly on some other cores,
e.g. the Mx35. Therefore we enable ERR_INT for those cores to realize
state changes.

Thanks for the info.

quoted

I just checked our ic guy of flexcan, it seems he also had no sense of

this issue.

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version
03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00
I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Our IC owner double checked the MX35 and MX53 IP and found the RX_WARN & TX_WARN
Interrupt source actually are not connected to ARM.
That means flexcan will not trigger interrupt to ARM core even RX_WARN or TX_WARN
Happens.
This may be the root cause that why you cannot see RX_WARN interrupt if not enable
bus error interrupt on mx35.
He also checked that mx6q has the rx/tx warning interrupt connected to arm.
So we guess mx6q does not have this issue.
Anyway, we can test to confirm.

Regards
Dong Aisheng

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Marc Kleine-Budde <mkl@pengutronix.de>
Date: 2012-10-08 09:31:39

On 10/08/2012 11:13 AM, Dong Aisheng-B29396 wrote:

quoted

I just checked our ic guy of flexcan, it seems he also had no sense of

this issue.

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version
03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00
I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Our IC owner double checked the MX35 and MX53 IP and found the RX_WARN & TX_WARN
Interrupt source actually are not connected to ARM.

Does this mean it's a SoC problem, not a problem of the ip core?

That means flexcan will not trigger interrupt to ARM core even RX_WARN or TX_WARN
Happens.
This may be the root cause that why you cannot see RX_WARN interrupt if not enable
bus error interrupt on mx35.
He also checked that mx6q has the rx/tx warning interrupt connected to arm.
So we guess mx6q does not have this issue.
Anyway, we can test to confirm.

What about mx25?

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Dong Aisheng-B29396 <hidden>
Date: 2012-10-08 09:43:02

-----Original Message-----
From: Marc Kleine-Budde [mailto:mkl@pengutronix.de]
Sent: Monday, October 08, 2012 5:32 PM
To: Dong Aisheng-B29396
Cc: Wolfgang Grandegger; Shawn Guo; Linux Netdev List; Linux-CAN; Hui Wang
Subject: Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28
Importance: High

On 10/08/2012 11:13 AM, Dong Aisheng-B29396 wrote:

quoted

I just checked our ic guy of flexcan, it seems he also had no sense
of

this issue.

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version
03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version
03.00.00.00 I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Our IC owner double checked the MX35 and MX53 IP and found the RX_WARN
& TX_WARN Interrupt source actually are not connected to ARM.

Does this mean it's a SoC problem, not a problem of the ip core?

It's not a problem of ip core, it's about how to use the IP.
I do not know why some i.MX SoCs does not use rx/tx warn interrupts.

quoted

That means flexcan will not trigger interrupt to ARM core even RX_WARN
or TX_WARN Happens.
This may be the root cause that why you cannot see RX_WARN interrupt
if not enable bus error interrupt on mx35.
He also checked that mx6q has the rx/tx warning interrupt connected to

arm.

quoted

So we guess mx6q does not have this issue.
Anyway, we can test to confirm.

What about mx25?

For mx25 and mx28, he could not access it now.
Will check tomorrow.

Regards
Dong Aisheng

RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Dong Aisheng-B29396 <hidden>
Date: 2012-10-09 11:52:51

Hi Wolfgang,

-----Original Message-----
From: Dong Aisheng-B29396
Sent: Monday, October 08, 2012 5:44 PM
To: 'Marc Kleine-Budde'
Cc: Wolfgang Grandegger; Shawn Guo; Linux Netdev List; Linux-CAN; Hui Wang
Subject: RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

quoted

-----Original Message-----
From: Marc Kleine-Budde [mailto:mkl@pengutronix.de]
Sent: Monday, October 08, 2012 5:32 PM
To: Dong Aisheng-B29396
Cc: Wolfgang Grandegger; Shawn Guo; Linux Netdev List; Linux-CAN; Hui
Wang
Subject: Re: [PATCH] flexcan: disable bus error interrupts for the
i.MX28
Importance: High

On 10/08/2012 11:13 AM, Dong Aisheng-B29396 wrote:

quoted

I just checked our ic guy of flexcan, it seems he also had no sense
of

this issue.

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version
03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version
03.00.00.00 I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Our IC owner double checked the MX35 and MX53 IP and found the
RX_WARN & TX_WARN Interrupt source actually are not connected to ARM.

Does this mean it's a SoC problem, not a problem of the ip core?

It's not a problem of ip core, it's about how to use the IP.
I do not know why some i.MX SoCs does not use rx/tx warn interrupts.

quoted

That means flexcan will not trigger interrupt to ARM core even
RX_WARN or TX_WARN Happens.
This may be the root cause that why you cannot see RX_WARN interrupt
if not enable bus error interrupt on mx35.
He also checked that mx6q has the rx/tx warning interrupt connected
to

arm.

quoted

So we guess mx6q does not have this issue.
Anyway, we can test to confirm.

What about mx25?

For mx25 and mx28, he could not access it now.
Will check tomorrow.

Just let you know:
The checking result is Mx28 has rx/tx warning interrupt line connected
while mx25 not.
Looks align with what we guess.

Regards
Dong Aisheng

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Wolfgang Grandegger <hidden>
Date: 2012-10-09 12:32:25

On 10/09/2012 01:52 PM, Dong Aisheng-B29396 wrote:

Hi Wolfgang,

quoted

-----Original Message-----
From: Dong Aisheng-B29396
Sent: Monday, October 08, 2012 5:44 PM
To: 'Marc Kleine-Budde'
Cc: Wolfgang Grandegger; Shawn Guo; Linux Netdev List; Linux-CAN; Hui Wang
Subject: RE: [PATCH] flexcan: disable bus error interrupts for the i.MX28

quoted

-----Original Message-----
From: Marc Kleine-Budde [mailto:mkl@pengutronix.de]
Sent: Monday, October 08, 2012 5:32 PM
To: Dong Aisheng-B29396
Cc: Wolfgang Grandegger; Shawn Guo; Linux Netdev List; Linux-CAN; Hui
Wang
Subject: Re: [PATCH] flexcan: disable bus error interrupts for the
i.MX28
Importance: High

On 10/08/2012 11:13 AM, Dong Aisheng-B29396 wrote:

quoted

I just checked our ic guy of flexcan, it seems he also had no sense
of

this issue.

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00
Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version
03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version
03.00.00.00 I'm not sure if mx6q has such issue.

OK, we need to find that out experimentally.

Our IC owner double checked the MX35 and MX53 IP and found the
RX_WARN & TX_WARN Interrupt source actually are not connected to ARM.

Does this mean it's a SoC problem, not a problem of the ip core?

It's not a problem of ip core, it's about how to use the IP.
I do not know why some i.MX SoCs does not use rx/tx warn interrupts.

quoted

That means flexcan will not trigger interrupt to ARM core even
RX_WARN or TX_WARN Happens.
This may be the root cause that why you cannot see RX_WARN interrupt
if not enable bus error interrupt on mx35.
He also checked that mx6q has the rx/tx warning interrupt connected
to

arm.

quoted

So we guess mx6q does not have this issue.
Anyway, we can test to confirm.

What about mx25?

For mx25 and mx28, he could not access it now.
Will check tomorrow.

Just let you know:
The checking result is Mx28 has rx/tx warning interrupt line connected
while mx25 not.
Looks align with what we guess.

OK, then I'm going to remove FLEXCAN_HAS_BROKEN_ERR_STATE for the mx6q
as well in the next version of the patch.

Thanks for taking care.

Wolfgang

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Marc Kleine-Budde <mkl@pengutronix.de>
Date: 2012-10-10 20:04:53

On 10/08/2012 09:59 AM, Dong Aisheng-B29396 wrote:
[...]

quoted

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a
newer version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN adapter :(,
unfortunately. Otherwise I would try it out myself.

How did you verify this issue?
I just checked our ic guy of flexcan, it seems he also had no sense of this issue.

Wolfgang added this table to the driver code, which is a very good idea.
I've some (nitpicky) questions :)

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00

    ^^^
Is this core different from the mx6q? Has the flexcan on mx6 a glitch
filter?

Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version 03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00

Do you have access to the powerpc designs which have a flexcan core,
too? I'm interested to complete the above table with powerpcs cores
(p1010 and similar).

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

Re: [PATCH] flexcan: disable bus error interrupts for the i.MX28

From: Dong Aisheng <hidden>
Date: 2012-10-11 02:12:53

On Wed, Oct 10, 2012 at 10:04:42PM +0200, Marc Kleine-Budde wrote:

On 10/08/2012 09:59 AM, Dong Aisheng-B29396 wrote:
[...]

quoted

Concerning the bug, I know that the i.MX35 does have it. Maybe other
Flexcan cores than on the i.MX28 does *not* have it either. If you
have a chance, please check on the P1010, i.MX6Q, i.MX51, i.MX53,
etc.

quoted

From what I can tell, i.MX35, i.MX51 and i.MX53 use the same version,

so they should all have the bug.  And for i.MX6Q, since it uses a
newer version even than i.MX28, I would believe it's affected by the bug.
But I'm copying Dong who should have better knowledge about this to
confirm.

Thank for clarification. I have a i.MX6Q board but without CAN adapter :(,
unfortunately. Otherwise I would try it out myself.

How did you verify this issue?
I just checked our ic guy of flexcan, it seems he also had no sense of this issue.

Wolfgang added this table to the driver code, which is a very good idea.
I've some (nitpicky) questions :)

quoted

Below is some version info what I got:
Mx6s use FlexCAN3, with IP version 10.00.12.00

    ^^^
Is this core different from the mx6q?

Yes, it's a single core named i.MX6 Solo.
For details, please see:
http://www.freescale.com/webapp/sps/site/taxonomy.jsp?code=IMX6X_SERIES

Has the flexcan on mx6 a glitch filter?

Yes.

quoted

Mx53 use FlexCAN2 (with glitch filter), with IP version 03.00.00.00
Mx28 use FlexCAN2 (with glitch filter), with IP version 03.00.04.00
Mx35 use FlexCAN2 (without glitch filter) , with IP version 03.00.00.00
Mx25 use FlexCAN2 (without glitch filter), with IP version 03.00.00.00

Do you have access to the powerpc designs which have a flexcan core,
too? I'm interested to complete the above table with powerpcs cores
(p1010 and similar).

Sorry, we don't have access.

Regards
Dong Aisheng

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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