Bug in smsc911x_init

Hi,

I've found that commit 3ac3546e5f17248d961ef0f4a27e75564bf71578, 
"net/smsc911x: Always wait for the chip to be ready" can cause init to 
fail. I am working on an out of tree board, but it will affect other 
users. With an smsc 9218 connected to a big endian processor using a 
16-bit bus, we have to wait for the value read from PMT_CTRL to be 0x10000 
rather than 0x1.

However, I am not sure what the correct test should be, as the data sheet 
states that you can't read or write to any other reg until the PMT_CTRL 
READY bit is set. Maybe we can poll until we get a valid result from 
reading BYTE_TEST, and then wait for the PMT_CTRL (endian specific) READY 
bit?

Regards
Phil