[PATCH 0/2] ptp: bug fixes for 3.1 and 3.0

STALE5544d

5 messages, 2 authors, 2011-08-08 · open the first message on its own page

[PATCH 0/2] ptp: bug fixes for 3.1 and 3.0

From: Richard Cochran <richardcochran@gmail.com>
Date: 2011-08-07 07:02:56

These two patches fix two bugs in the PTP Hardware Clock drivers. The
drivers were first introduced in Linux version 3.0.

Please apply them.

Thanks,
Richard


Richard Cochran (2):
  gianfar: fix fiper alignment after resetting the time
  dp83640: increase receive time stamp buffer size

 drivers/net/gianfar_ptp.c |    9 ++-------
 drivers/net/phy/dp83640.c |    5 ++---
 2 files changed, 4 insertions(+), 10 deletions(-)

[PATCH 2/2] dp83640: increase receive time stamp buffer size

From: Richard Cochran <richardcochran@gmail.com>
Date: 2011-08-07 07:03:12

The dp83640 buffers receive time stamps from special PHY status frames,
matching them to received PTP packets in a work queue. Because the timeout
for orphaned time stamps is so long and the buffer is so small, the driver
can drop time stamps under moderate PTP traffic.

This commit fixes the issue by decreasing the timeout to (at least) one
timer tick and increasing the buffer size.

Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
---
 drivers/net/phy/dp83640.c |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index 2cd8dc5..cb6e0b4 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c
@@ -34,8 +34,7 @@
 #define PAGESEL		0x13
 #define LAYER4		0x02
 #define LAYER2		0x01
-#define MAX_RXTS	4
-#define MAX_TXTS	4
+#define MAX_RXTS	64
 #define N_EXT_TS	1
 #define PSF_PTPVER	2
 #define PSF_EVNT	0x4000
@@ -218,7 +217,7 @@ static void phy2rxts(struct phy_rxts *p, struct rxts *rxts)
 	rxts->seqid = p->seqid;
 	rxts->msgtype = (p->msgtype >> 12) & 0xf;
 	rxts->hash = p->msgtype & 0x0fff;
-	rxts->tmo = jiffies + HZ;
+	rxts->tmo = jiffies + 2;
 }
 
 static u64 phy2txts(struct phy_txts *p)
-- 
1.7.0.4

[PATCH 1/2] gianfar: fix fiper alignment after resetting the time

From: Richard Cochran <richardcochran@gmail.com>
Date: 2011-08-07 07:08:57

After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.

Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.

Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)

Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
---
 drivers/net/gianfar_ptp.c |    9 ++-------
 1 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/net/gianfar_ptp.c b/drivers/net/gianfar_ptp.c
index 1c97861..f67b8ae 100644
--- a/drivers/net/gianfar_ptp.c
+++ b/drivers/net/gianfar_ptp.c
@@ -193,14 +193,9 @@ static void set_alarm(struct etsects *etsects)
 /* Caller must hold etsects->lock. */
 static void set_fipers(struct etsects *etsects)
 {
-	u32 tmr_ctrl = gfar_read(&etsects->regs->tmr_ctrl);
-
-	gfar_write(&etsects->regs->tmr_ctrl,   tmr_ctrl & (~TE));
-	gfar_write(&etsects->regs->tmr_prsc,   etsects->tmr_prsc);
+	set_alarm(etsects);
 	gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1);
 	gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2);
-	set_alarm(etsects);
-	gfar_write(&etsects->regs->tmr_ctrl,   tmr_ctrl|TE);
 }
 
 /*
@@ -511,7 +506,7 @@ static int gianfar_ptp_probe(struct platform_device *dev)
 	gfar_write(&etsects->regs->tmr_fiper1, etsects->tmr_fiper1);
 	gfar_write(&etsects->regs->tmr_fiper2, etsects->tmr_fiper2);
 	set_alarm(etsects);
-	gfar_write(&etsects->regs->tmr_ctrl,   tmr_ctrl|FS|RTPE|TE);
+	gfar_write(&etsects->regs->tmr_ctrl,   tmr_ctrl|FS|RTPE|TE|FRD);
 
 	spin_unlock_irqrestore(&etsects->lock, flags);
 
-- 
1.7.0.4

Re: [PATCH 1/2] gianfar: fix fiper alignment after resetting the time

From: David Miller <davem@davemloft.net>
Date: 2011-08-08 05:53:39

From: Richard Cochran <richardcochran@gmail.com>
Date: Sun,  7 Aug 2011 09:03:03 +0200
After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.

Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.

Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)

Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
Applied.

Re: [PATCH 2/2] dp83640: increase receive time stamp buffer size

From: David Miller <davem@davemloft.net>
Date: 2011-08-08 05:53:43

From: Richard Cochran <richardcochran@gmail.com>
Date: Sun,  7 Aug 2011 09:03:04 +0200
The dp83640 buffers receive time stamps from special PHY status frames,
matching them to received PTP packets in a work queue. Because the timeout
for orphaned time stamps is so long and the buffer is so small, the driver
can drop time stamps under moderate PTP traffic.

This commit fixes the issue by decreasing the timeout to (at least) one
timer tick and increasing the buffer size.

Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
Applied.

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