From: Richard Cochran <richardcochran@gmail.com> Date: 2011-08-07 07:02:56
These two patches fix two bugs in the PTP Hardware Clock drivers. The
drivers were first introduced in Linux version 3.0.
Please apply them.
Thanks,
Richard
Richard Cochran (2):
gianfar: fix fiper alignment after resetting the time
dp83640: increase receive time stamp buffer size
drivers/net/gianfar_ptp.c | 9 ++-------
drivers/net/phy/dp83640.c | 5 ++---
2 files changed, 4 insertions(+), 10 deletions(-)
From: Richard Cochran <richardcochran@gmail.com> Date: 2011-08-07 07:03:12
The dp83640 buffers receive time stamps from special PHY status frames,
matching them to received PTP packets in a work queue. Because the timeout
for orphaned time stamps is so long and the buffer is so small, the driver
can drop time stamps under moderate PTP traffic.
This commit fixes the issue by decreasing the timeout to (at least) one
timer tick and increasing the buffer size.
Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
---
drivers/net/phy/dp83640.c | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
From: Richard Cochran <richardcochran@gmail.com> Date: 2011-08-07 07:08:57
After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.
Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.
Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)
Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
---
drivers/net/gianfar_ptp.c | 9 ++-------
1 files changed, 2 insertions(+), 7 deletions(-)
From: David Miller <davem@davemloft.net> Date: 2011-08-08 05:53:39
From: Richard Cochran <richardcochran@gmail.com>
Date: Sun, 7 Aug 2011 09:03:03 +0200
After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.
Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.
Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)
Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>
From: David Miller <davem@davemloft.net> Date: 2011-08-08 05:53:43
From: Richard Cochran <richardcochran@gmail.com>
Date: Sun, 7 Aug 2011 09:03:04 +0200
The dp83640 buffers receive time stamps from special PHY status frames,
matching them to received PTP packets in a work queue. Because the timeout
for orphaned time stamps is so long and the buffer is so small, the driver
can drop time stamps under moderate PTP traffic.
This commit fixes the issue by decreasing the timeout to (at least) one
timer tick and increasing the buffer size.
Signed-off-by: Richard Cochran <redacted>
Cc: <stable@kernel.org>