From: Mike Frysinger <redacted>
Date: Fri, 29 May 2009 07:45:05 -0400

On Fri, May 29, 2009 at 07:28, David Miller wrote:

quoted

From: Mike Frysinger <redacted>

quoted

why implement extra over head in an interrupt handler to support an
operating mode the hardware can never support.

What overhead?  It should be pretty easy to see if the device
is really indicating an interrupt or not :-)

which would involve reading system mmrs which are clocked at the
system frequency and thus make the core stall

And the core doesn't stall reading in these cache lines that the chip
has just DMA'd to?

I think you're throwing the baby out with the bath water :-)