[patch 06/20] sky2: check drop truncated packets

-stable review patch.  If anyone has any objections, please let us know.

------------------
From: Stephen Hemminger <redacted>

Backport of commit 71749531f2d1954137a1a77422ef4ff29eb102dd

If packet larger than MTU is received, the driver uses hardware to
truncate the packet. Use the status registers to catch/drop them.

Signed-off-by: Stephen Hemminger <redacted>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

---
 drivers/net/sky2.c |    8 ++++++++
 1 file changed, 8 insertions(+)

--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c

@@ -2065,6 +2065,9 @@ static struct sk_buff *sky2_receive(stru
 	if (!(status & GMR_FS_RX_OK))
 		goto resubmit;
 
+	if (status >> 16 != length)
+		goto len_mismatch;
+
 	if (length < copybreak)
 		skb = receive_copy(sky2, re, length);
 	else

@@ -2074,6 +2077,11 @@ resubmit:
 
 	return skb;
 
+len_mismatch:
+	/* Truncation of overlength packets
+	   causes PHY length to not match MAC length */
+	++sky2->net_stats.rx_length_errors;
+
 error:
 	++sky2->net_stats.rx_errors;
 	if (status & GMR_FS_RX_FF_OV) {

-- 

There are special PHY settings available on Yukon EC-U chip that
should not get cleared. This should solve mysterious errors on some
motherboards (like Gigabyte DS-3).

Signed-off-by: Stephen Hemminger <redacted>

--- a/drivers/net/sky2.c	2007-08-21 11:08:27.000000000 -0700
+++ b/drivers/net/sky2.c	2007-08-21 11:09:03.000000000 -0700

@@ -657,8 +657,8 @@ static void sky2_mac_init(struct sky2_hw
 	int i;
 	const u8 *addr = hw->dev[port]->dev_addr;
 
-	sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
-	sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
+	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
+	sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
 
 	sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
 

On Tue, 21 Aug 2007, Stephen Hemminger wrote:

There are special PHY settings available on Yukon EC-U chip that
should not get cleared. This should solve mysterious errors on some
motherboards (like Gigabyte DS-3).

Ok, applied.

However:

 - now all accesses to GPHY_CTRL are 8-bit (it used to mix them). Good.

 - but sky2.h still says "32 bit" about the register

Should the comments in sky2.h perhaps be fixed?

		Linus

On Tue, 21 Aug 2007 11:26:23 -0700 (PDT)
Linus Torvalds [off-list ref] wrote:

On Tue, 21 Aug 2007, Stephen Hemminger wrote:

quoted

There are special PHY settings available on Yukon EC-U chip that
should not get cleared. This should solve mysterious errors on some
motherboards (like Gigabyte DS-3).

Ok, applied.

However:

 - now all accesses to GPHY_CTRL are 8-bit (it used to mix them). Good.

 - but sky2.h still says "32 bit" about the register

Should the comments in sky2.h perhaps be fixed?

Register is 32 bit, I'll add documentation about other bits.

-- 
Stephen Hemminger [off-list ref]