Inter-revision diff: patch 5

Comparing v16 (message) to v14 (message)

--- v16
+++ v14
@@ -7,36 +7,32 @@
 Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
 Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
 ---
- tools/testing/selftests/powerpc/ptrace/Makefile    |   5 +-
- .../selftests/powerpc/ptrace/ptrace-tm-gpr.c       | 158 +++++++++++++++++++++
- 2 files changed, 161 insertions(+), 2 deletions(-)
+ tools/testing/selftests/powerpc/ptrace/Makefile    |   3 +-
+ .../selftests/powerpc/ptrace/ptrace-tm-gpr.c       | 296 +++++++++++++++++++++
+ 2 files changed, 298 insertions(+), 1 deletion(-)
  create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
 
 diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
-index e9b8e7d..bb958a8 100644
+index 31e8e33..170683a 100644
 --- a/tools/testing/selftests/powerpc/ptrace/Makefile
 +++ b/tools/testing/selftests/powerpc/ptrace/Makefile
-@@ -1,11 +1,12 @@
+@@ -1,8 +1,9 @@
 -TEST_PROGS := ptrace-ebb ptrace-gpr
 +TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
  
- include ../../lib.mk
- 
  all: $(TEST_PROGS)
--CFLAGS += -m64
-+CFLAGS += -m64 -I../tm -mhtm
- $(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
+ CFLAGS += -m64
+ $(TEST_PROGS): ../harness.c ptrace.S ../utils.c ptrace.h
  ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S ../pmu/ebb/busy_loop.S
- ptrace-ebb: CFLAGS += -I../pmu/ebb
 +
  clean:
  	rm -f $(TEST_PROGS) *.o
 diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
 new file mode 100644
-index 0000000..59206b9
+index 0000000..8417d04
 --- /dev/null
 +++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
-@@ -0,0 +1,158 @@
+@@ -0,0 +1,296 @@
 +/*
 + * Ptrace test for GPR/FPR registers in TM context
 + *
@@ -49,11 +45,10 @@
 + */
 +#include "ptrace.h"
 +#include "ptrace-gpr.h"
-+#include "tm.h"
 +
 +/* Tracer and Tracee Shared Data */
 +int shm_id;
-+unsigned long *cptr, *pptr;
++volatile unsigned long *cptr, *pptr;
 +
 +float a = FPR_1;
 +float b = FPR_2;
@@ -71,20 +66,122 @@
 +trans:
 +	cptr[1] = 0;
 +	asm __volatile__(
-+		ASM_LOAD_GPR_IMMED(gpr_1)
-+		ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
++
++		"li 14, %[gpr_1];"
++		"li 15, %[gpr_1];"
++		"li 16, %[gpr_1];"
++		"li 17, %[gpr_1];"
++		"li 18, %[gpr_1];"
++		"li 19, %[gpr_1];"
++		"li 20, %[gpr_1];"
++		"li 21, %[gpr_1];"
++		"li 22, %[gpr_1];"
++		"li 23, %[gpr_1];"
++		"li 24, %[gpr_1];"
++		"li 25, %[gpr_1];"
++		"li 26, %[gpr_1];"
++		"li 27, %[gpr_1];"
++		"li 28, %[gpr_1];"
++		"li 29, %[gpr_1];"
++		"li 30, %[gpr_1];"
++		"li 31, %[gpr_1];"
++
++		"lfs 0, 0(%[flt_1]);"
++		"lfs 1, 0(%[flt_1]);"
++		"lfs 2, 0(%[flt_1]);"
++		"lfs 3, 0(%[flt_1]);"
++		"lfs 4, 0(%[flt_1]);"
++		"lfs 5, 0(%[flt_1]);"
++		"lfs 6, 0(%[flt_1]);"
++		"lfs 7, 0(%[flt_1]);"
++		"lfs 8, 0(%[flt_1]);"
++		"lfs 9, 0(%[flt_1]);"
++		"lfs 10, 0(%[flt_1]);"
++		"lfs 11, 0(%[flt_1]);"
++		"lfs 12, 0(%[flt_1]);"
++		"lfs 13, 0(%[flt_1]);"
++		"lfs 14, 0(%[flt_1]);"
++		"lfs 15, 0(%[flt_1]);"
++		"lfs 16, 0(%[flt_1]);"
++		"lfs 17, 0(%[flt_1]);"
++		"lfs 18, 0(%[flt_1]);"
++		"lfs 19, 0(%[flt_1]);"
++		"lfs 20, 0(%[flt_1]);"
++		"lfs 21, 0(%[flt_1]);"
++		"lfs 22, 0(%[flt_1]);"
++		"lfs 23, 0(%[flt_1]);"
++		"lfs 24, 0(%[flt_1]);"
++		"lfs 25, 0(%[flt_1]);"
++		"lfs 26, 0(%[flt_1]);"
++		"lfs 27, 0(%[flt_1]);"
++		"lfs 28, 0(%[flt_1]);"
++		"lfs 29, 0(%[flt_1]);"
++		"lfs 30, 0(%[flt_1]);"
++		"lfs 31, 0(%[flt_1]);"
++
 +		"1: ;"
-+		"tbegin.;"
++		TBEGIN
 +		"beq 2f;"
-+		ASM_LOAD_GPR_IMMED(gpr_2)
-+		ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
-+		"tsuspend.;"
++
++		"li 14, %[gpr_2];"
++		"li 15, %[gpr_2];"
++		"li 16, %[gpr_2];"
++		"li 17, %[gpr_2];"
++		"li 18, %[gpr_2];"
++		"li 19, %[gpr_2];"
++		"li 20, %[gpr_2];"
++		"li 21, %[gpr_2];"
++		"li 22, %[gpr_2];"
++		"li 23, %[gpr_2];"
++		"li 24, %[gpr_2];"
++		"li 25, %[gpr_2];"
++		"li 26, %[gpr_2];"
++		"li 27, %[gpr_2];"
++		"li 28, %[gpr_2];"
++		"li 29, %[gpr_2];"
++		"li 30, %[gpr_2];"
++		"li 31, %[gpr_2];"
++
++
++		"lfs 0, 0(%[flt_2]);"
++		"lfs 1, 0(%[flt_2]);"
++		"lfs 2, 0(%[flt_2]);"
++		"lfs 3, 0(%[flt_2]);"
++		"lfs 4, 0(%[flt_2]);"
++		"lfs 5, 0(%[flt_2]);"
++		"lfs 6, 0(%[flt_2]);"
++		"lfs 7, 0(%[flt_2]);"
++		"lfs 8, 0(%[flt_2]);"
++		"lfs 9, 0(%[flt_2]);"
++		"lfs 10, 0(%[flt_2]);"
++		"lfs 11, 0(%[flt_2]);"
++		"lfs 12, 0(%[flt_2]);"
++		"lfs 13, 0(%[flt_2]);"
++		"lfs 14, 0(%[flt_2]);"
++		"lfs 15, 0(%[flt_2]);"
++		"lfs 16, 0(%[flt_2]);"
++		"lfs 17, 0(%[flt_2]);"
++		"lfs 18, 0(%[flt_2]);"
++		"lfs 19, 0(%[flt_2]);"
++		"lfs 20, 0(%[flt_2]);"
++		"lfs 21, 0(%[flt_2]);"
++		"lfs 22, 0(%[flt_2]);"
++		"lfs 23, 0(%[flt_2]);"
++		"lfs 24, 0(%[flt_2]);"
++		"lfs 25, 0(%[flt_2]);"
++		"lfs 26, 0(%[flt_2]);"
++		"lfs 27, 0(%[flt_2]);"
++		"lfs 28, 0(%[flt_2]);"
++		"lfs 29, 0(%[flt_2]);"
++		"lfs 30, 0(%[flt_2]);"
++		"lfs 31, 0(%[flt_2]);"
++		TSUSPEND
 +		"li 7, 1;"
 +		"stw 7, 0(%[cptr1]);"
-+		"tresume.;"
++		TRESUME
 +		"b .;"
 +
-+		"tend.;"
++		TEND
 +		"li 0, 0;"
 +		"ori %[res], 0, 0;"
 +		"b 3f;"
@@ -113,7 +210,7 @@
 +
 +		shmdt((void *)cptr);
 +		store_gpr(gpr_buf);
-+		store_fpr_single_precision(fpr_buf);
++		store_fpr(fpr_buf);
 +
 +		if (validate_gpr(gpr_buf, GPR_3))
 +			exit(1);
@@ -131,21 +228,56 @@
 +{
 +	unsigned long gpr[18];
 +	unsigned long fpr[32];
-+
-+	FAIL_IF(start_trace(child));
-+	FAIL_IF(show_gpr(child, gpr));
-+	FAIL_IF(validate_gpr(gpr, GPR_2));
-+	FAIL_IF(show_fpr(child, fpr));
-+	FAIL_IF(validate_fpr(fpr, FPR_2_REP));
-+	FAIL_IF(show_ckpt_fpr(child, fpr));
-+	FAIL_IF(validate_fpr(fpr, FPR_1_REP));
-+	FAIL_IF(show_ckpt_gpr(child, gpr));
-+	FAIL_IF(validate_gpr(gpr, GPR_1));
-+	FAIL_IF(write_ckpt_gpr(child, GPR_3));
-+	FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
++	int ret;
++
++	ret = start_trace(child);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = show_gpr(child, gpr);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = validate_gpr(gpr, GPR_2);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = show_fpr(child, fpr);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = validate_fpr(fpr, FPR_2_REP);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = show_ckpt_fpr(child, fpr);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = validate_fpr(fpr, FPR_1_REP);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = show_ckpt_gpr(child, gpr);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = validate_gpr(gpr, GPR_1);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = write_ckpt_gpr(child, GPR_3);
++	if (ret)
++		return TEST_FAIL;
++
++	ret = write_ckpt_fpr(child, FPR_3_REP);
++	if (ret)
++		return TEST_FAIL;
 +
 +	pptr[0] = 1;
-+	FAIL_IF(stop_trace(child));
++	ret = stop_trace(child);
++	if (ret)
++		return TEST_FAIL;
 +
 +	return TEST_PASS;
 +}
@@ -155,7 +287,7 @@
 +	pid_t pid;
 +	int ret, status;
 +
-+	SKIP_IF(!have_htm());
++	SKIP_IF(!((long)get_auxv_entry(AT_HWCAP2) & PPC_FEATURE2_HTM));
 +	shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
 +	pid = fork();
 +	if (pid < 0) {
@@ -168,8 +300,7 @@
 +	if (pid) {
 +		pptr = (unsigned long *)shmat(shm_id, NULL, 0);
 +
-+		while (!pptr[1])
-+			asm volatile("" : : : "memory");
++		while (!pptr[1]);
 +		ret = trace_tm_gpr(pid);
 +		if (ret) {
 +			kill(pid, SIGTERM);
@@ -185,8 +316,11 @@
 +			return TEST_FAIL;
 +		}
 +
-+		return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
-+			TEST_PASS;
++		if (WIFEXITED(status)) {
++			if (WEXITSTATUS(status))
++				return TEST_FAIL;
++		}
++		return TEST_PASS;
 +	}
 +	return TEST_PASS;
 +}
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